xiaoxiaocheng_plc/users/NVIC_interrupt.c

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3.9 KiB
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2018-11-13 22:25:34 +08:00
/********************************************************/
// CPU<50><55>Ҫ<EFBFBD><D2AA>STM32F103--RAM<41>ڴ治С<E6B2BB><D0A1>64K Flash<73>ڴ治С<E6B2BB><D0A1>128K
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>STM32F103RDT6<54><36>VET6<54><36><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
// <20><EFBFBD><E0BCAD><EFBFBD>ڣ<EFBFBD>20150909
// editor by СС<D0A1><D0A1>
// <20><><EFBFBD>꣺shop182385147.taobao.com
/********************************************************/
#include "stm32f10x.h"
#include "stm32f10x_flash.h"
#include "main.h"
#include <stdio.h>
#include <absacc.h>
void NCIC_Confinguration(FunctionalState NewState)
{
NVIC_InitTypeDef NVIC_InitStructure;
/* Set the Vector Table base address at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0000);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_3 );
/* Enable the USART1 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; //<2F><><EFBFBD><EFBFBD>1 <20>жϵ<D0B6><CFB5><EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn; //DMA<4D><41><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; //<2F><><EFBFBD><EFBFBD>3 <20>жϵ<D0B6><CFB5><EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //<2F><>ʱ<EFBFBD><CAB1>3<EFBFBD>ж<EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 5;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQn; //<2F><>ʱ<EFBFBD><CAB1>4<EFBFBD>ж<EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 4;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
/* Enable the TIM5 gloabal Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn; //<2F><>ʱ<EFBFBD><CAB1>5 <20>жϵ<D0B6><CFB5><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>PLC<4C><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 6;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
/* ʹ<>ܶ<EFBFBD>ʱ<EFBFBD><CAB1> TIM8_CC <20>ж<EFBFBD> */
NVIC_InitStructure.NVIC_IRQChannel = TIM8_CC_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn; //<2F><>ʱ<EFBFBD><CAB1>2<EFBFBD>ж<EFBFBD>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn; //<2F>ⲿ<EFBFBD>ж<EFBFBD>10-15
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 4;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn; //<2F>ⲿ<EFBFBD>ж<EFBFBD>9-5
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = NewState;
NVIC_Init(&NVIC_InitStructure);
}