465 lines
16 KiB
C
465 lines
16 KiB
C
/**************************************************************************//**
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* @file nu_tamper.h
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* @version V3.00
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* @brief M2354 series TAMPER driver header file
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*
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* @copyright SPDX-License-Identifier: Apache-2.0
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* @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __NU_TAMPER_H__
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#define __NU_TAMPER_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup TAMPER_Driver Tamper Driver
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@{
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*/
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/** @addtogroup TAMPER_EXPORTED_CONSTANTS Tamper Exported Constants
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@{
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*/
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#define TAMPER_TAMPER0_SELECT (0x1UL << 0) /*!< Select Tamper 0 */
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#define TAMPER_TAMPER1_SELECT (0x1UL << 1) /*!< Select Tamper 1 */
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#define TAMPER_TAMPER2_SELECT (0x1UL << 2) /*!< Select Tamper 2 */
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#define TAMPER_TAMPER3_SELECT (0x1UL << 3) /*!< Select Tamper 3 */
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#define TAMPER_TAMPER4_SELECT (0x1UL << 4) /*!< Select Tamper 4 */
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#define TAMPER_TAMPER5_SELECT (0x1UL << 5) /*!< Select Tamper 5 */
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#define TAMPER_MAX_TAMPER_PIN_NUM 6UL /*!< Tamper Pin number */
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#define TAMPER_TAMPER_HIGH_LEVEL_DETECT 1UL /*!< Tamper pin detect voltage level is high */
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#define TAMPER_TAMPER_LOW_LEVEL_DETECT 0UL /*!< Tamper pin detect voltage level is low */
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#define TAMPER_TAMPER_DEBOUNCE_ENABLE 1UL /*!< Enable tamper pin de-bounce function */
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#define TAMPER_TAMPER_DEBOUNCE_DISABLE 0UL /*!< Disable tamper pin de-bounce function */
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#define TAMPER_PAIR0_SELECT (0x1UL << 0) /*!< Select Pair 0 */
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#define TAMPER_PAIR1_SELECT (0x1UL << 1) /*!< Select Pair 1 */
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#define TAMPER_PAIR2_SELECT (0x1UL << 2) /*!< Select Pair 2 */
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#define TAMPER_MAX_PAIR_NUM 3UL /*!< Pair number */
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#define TAMPER_2POW6_CLK (0x0UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 RTC clock cycles */
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#define TAMPER_2POW7_CLK (0x1UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 2 RTC clock cycles */
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#define TAMPER_2POW8_CLK (0x2UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 4 RTC clock cycles */
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#define TAMPER_2POW9_CLK (0x3UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 6 RTC clock cycles */
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#define TAMPER_2POW10_CLK (0x4UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 8 RTC clock cycles */
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#define TAMPER_2POW11_CLK (0x5UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 10 RTC clock cycles */
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#define TAMPER_2POW12_CLK (0x6UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 12 RTC clock cycles */
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#define TAMPER_2POW13_CLK (0x7UL << TAMPER_TIOCTL_DYNRATE_Pos) /*!< 64 x 14 RTC clock cycles */
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#define TAMPER_ACTS_2POW10_CLK (0x0UL << 5) /*!< 1024 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW11_CLK (0x1UL << 5) /*!< 1024 x 2 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW12_CLK (0x2UL << 5) /*!< 1024 x 4 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW13_CLK (0x3UL << 5) /*!< 1024 x 6 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW14_CLK (0x4UL << 5) /*!< 1024 x 8 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW15_CLK (0x5UL << 5) /*!< 1024 x 16 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW16_CLK (0x6UL << 5) /*!< 1024 x 32 LIRC32K clock cycles */
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#define TAMPER_ACTS_2POW17_CLK (0x7UL << 5) /*!< 1024 x 64 LIRC32K clock cycles */
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#define TAMPER_REF_RANDOM_PATTERN 0x0UL /*!< The new reference pattern is generated by random number generator when the reference pattern run out */
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#define TAMPER_REF_SEED 0x1UL /*!< The new reference pattern is repeated from SEED (TAMPER_SEED[31:0]) when the reference pattern run out */
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#define TAMPER_VG_192M_SAMPLE 0x0UL /*!< Select voltage glitch 192M sampleing rate */
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/**@}*/ /* end of group TAMPER_EXPORTED_CONSTANTS */
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/** @addtogroup TAMPER_EXPORTED_FUNCTIONS Tamper Exported Functions
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@{
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*/
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/**
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* @brief Reset Tamper Coreblock
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER INIT control register to reset the tamper coreblock.
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*
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*/
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#define TAMPER_CORE_RESET() ((uint32_t)(TAMPER->INIT = 0x55AA))
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/**
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* @brief Release Tamper Coreblock
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER INIT control register to release the tamper coreblock.
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*
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*/
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#define TAMPER_CORE_RELEASE() ((uint32_t)(TAMPER->INIT = 0x5500))
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/**
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* @brief Get the Voltage Regulator Power Ready Status
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*
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* @param None
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*
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* @retval 0 The power status of voltage regulator is not ready.
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* @retval 1 The power status of voltage regulator is ready.
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*
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* @details This macro will return the power status of voltage regulator.
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*
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*/
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#define TAMPER_TLDO_IS_READY() (TAMPER->INIT & TAMPER_INIT_TLDORDY_Msk ? 1:0)
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/**
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* @brief Enable LXT Clock Detection
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to enable LXT clock detection.
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*
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*/
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#define TAMPER_ENABLE_LXTDET() ((uint32_t)(TAMPER->FUNEN = (TAMPER->FUNEN & ~0xFFUL) | 0x44))
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/**
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* @brief Disable LXT Clock Detection
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to disable LXT clock detection.
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*
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*/
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#define TAMPER_DISABLE_LXTDET() ((uint32_t)(TAMPER->FUNEN = (TAMPER->FUNEN & ~0xFFUL) | 0x40))
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/**
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* @brief Tamper I/O TAMPER Block Detection Selection
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*
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* @param[in] u32TamperSelect Tamper pin select. Possible options are
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* - \ref TAMPER_TAMPER0_SELECT
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* - \ref TAMPER_TAMPER1_SELECT
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* - \ref TAMPER_TAMPER2_SELECT
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* - \ref TAMPER_TAMPER3_SELECT
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* - \ref TAMPER_TAMPER4_SELECT
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* - \ref TAMPER_TAMPER5_SELECT
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to select tamper I/O 0~5 and its function is detected through TAMPER block.
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*
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*/
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__STATIC_INLINE void TAMPER_IOSEL_TAMPER(uint32_t u32TamperSelect)
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{
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uint32_t i;
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for(i = 0UL; i < (uint32_t)TAMPER_MAX_TAMPER_PIN_NUM; i++)
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{
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if(u32TamperSelect & (0x1UL << i))
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{
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TAMPER->FUNEN = (TAMPER->FUNEN & ~0xFFUL) | (0x94 + i * 0x10UL);
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}
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}
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}
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/**
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* @brief Tamper I/O RTC Block Detection Selection
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*
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* @param[in] u32TamperSelect Tamper pin select. Possible options are
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* - \ref TAMPER_TAMPER0_SELECT
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* - \ref TAMPER_TAMPER1_SELECT
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* - \ref TAMPER_TAMPER2_SELECT
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* - \ref TAMPER_TAMPER3_SELECT
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* - \ref TAMPER_TAMPER4_SELECT
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* - \ref TAMPER_TAMPER5_SELECT
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to select tamper I/O 0~5 and its function is detected through RTC block.
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*
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*/
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__STATIC_INLINE void TAMPER_IOSEL_RTC(uint32_t u32TamperSelect)
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{
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uint32_t i;
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for(i = 0UL; i < (uint32_t)TAMPER_MAX_TAMPER_PIN_NUM; i++)
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{
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if(u32TamperSelect & (0x1UL << i))
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{
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TAMPER->FUNEN = (TAMPER->FUNEN & ~0xFFUL) | (0x90 + i * 0x10UL);
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}
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}
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}
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/**
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* @brief Enable HIRC48M
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to enable HIRC48M.
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*
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*/
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#define TAMPER_ENABLE_HIRC48M() ((uint32_t)(TAMPER->FUNEN &= (~TAMPER_FUNEN_HIRC48MEN_Msk)))
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/**
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* @brief Disable HIRC48M
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*
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* @param None
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to disable HIRC48M.
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*
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*/
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#define TAMPER_DISABLE_HIRC48M() ((uint32_t)(TAMPER->FUNEN = (TAMPER->FUNEN & (~TAMPER_FUNEN_HIRC48MEN_Msk)) | (0x5A << TAMPER_FUNEN_HIRC48MEN_Pos)))
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/**
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* @brief Voltage Glitch Sampling Rate Selection
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*
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* @param[in] u32VGSampleRate Voltage Glitch sampling rate select. Possible option is
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* - \ref TAMPER_VG_192M_SAMPLE
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*
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* @return None
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*
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* @details To set TAMPER FUNEN control register to enable voltage glitch channel 0~3 to select voltage glitch sampling rate.
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*
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*/
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__STATIC_INLINE void TAMPER_VG_SAMPLE_SEL(uint32_t u32VGSampleRate)
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{
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TAMPER->FUNEN &= ~0xF000000UL;
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if(u32VGSampleRate == TAMPER_VG_192M_SAMPLE)
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{
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TAMPER->FUNEN |= TAMPER_FUNEN_VGCHEN0_Msk | TAMPER_FUNEN_VGCHEN1_Msk | TAMPER_FUNEN_VGCHEN2_Msk | TAMPER_FUNEN_VGCHEN3_Msk;
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}
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}
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/**
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* @brief Enable to Trigger Key Store
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*
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* @param None
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*
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* @return None
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*
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* @details Set KSTRIGEN bit of TAMPER TRIEN control register to trigger Key Store when Tamper event is detected.
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*
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*/
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#define TAMPER_ENABLE_KS_TRIG() ((uint32_t)(TAMPER->TRIEN |= TAMPER_TRIEN_KSTRIGEN_Msk))
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/**
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* @brief Disable to Trigger Key Store
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*
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* @param None
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*
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* @return None
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*
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* @details Clear KSTRIGEN bit of TAMPER TRIEN control register to not trigger Key Store when Tamper event is detected.
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*
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*/
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#define TAMPER_DISABLE_KS_TRIG() ((uint32_t)(TAMPER->TRIEN &= (~TAMPER_TRIEN_KSTRIGEN_Msk)))
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/**
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* @brief Enable Wake-up Function
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*
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* @param None
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*
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* @return None
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*
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* @details Set WAKEUPEN bit of TAMPER TRIEN control register to wake-up the system when Tamper event is detected.
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*
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*/
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#define TAMPER_ENABLE_WAKEUP() ((uint32_t)(TAMPER->TRIEN |= TAMPER_TRIEN_WAKEUPEN_Msk))
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/**
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* @brief Disable Wake-up Function
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*
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* @param None
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*
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* @return None
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*
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* @details Clear WAKEUPEN bit of TAMPER TRIEN control register to not wake-up the system when Tamper event is detected.
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*
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*/
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#define TAMPER_DISABLE_WAKEUP() ((uint32_t)(TAMPER->TRIEN &= (~TAMPER_TRIEN_WAKEUPEN_Msk)))
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/**
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* @brief Enable to Clear Crypto Function
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*
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* @param None
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*
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* @return None
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*
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* @details Set CRYPTOEN bit of TAMPER TRIEN control register to reset Crypto when Tamper event is detected.
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*
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*/
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#define TAMPER_ENABLE_CRYPTO() ((uint32_t)(TAMPER->TRIEN |= TAMPER_TRIEN_CRYPTOEN_Msk))
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/**
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* @brief Disable to Clear Crypto Function
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*
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* @param None
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*
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* @return None
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*
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* @details Clear CRYPTOEN bit of TAMPER TRIEN control register to not reset Crypto when Tamper event is detected.
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*
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*/
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#define TAMPER_DISABLE_CRYPTO() ((uint32_t)(TAMPER->TRIEN &= (~TAMPER_TRIEN_CRYPTOEN_Msk)))
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/**
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* @brief Enable to Trigger Chip Reset
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*
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* @param None
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*
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* @return None
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*
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* @details Set CHIPRSTEN bit of TAMPER TRIEN control register to reset the system when Tamper event is detected.
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*
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*/
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#define TAMPER_ENABLE_CHIPRST() ((uint32_t)(TAMPER->TRIEN |= TAMPER_TRIEN_CHIPRSTEN_Msk))
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/**
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* @brief Disable to Trigger Chip Reset
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*
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* @param None
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*
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* @return None
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*
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* @details Clear CHIPRSTEN bit of TAMPER TRIEN control register to not reset the system when Tamper event is detected.
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*
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*/
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#define TAMPER_DISABLE_CHIPRST() ((uint32_t)(TAMPER->TRIEN &= (~TAMPER_TRIEN_CHIPRSTEN_Msk)))
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/**
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* @brief Enable to Clear RTC Spare Register
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*
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* @param None
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*
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* @return None
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*
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* @details Set RTCSPCLREN bit of TAMPER TRIEN control register to reset RTC spare register when Tamper event is detected.
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*
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*/
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#define TAMPER_ENABLE_RTCSPCLR() ((uint32_t)(TAMPER->TRIEN |= TAMPER_TRIEN_RTCSPCLREN_Msk))
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/**
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* @brief Disable to Clear RTC Spare Register
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*
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* @param None
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*
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* @return None
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*
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* @details Clear RTCSPCLREN bit of TAMPER TRIEN control register to not reset RTC spare register when Tamper event is detected.
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*
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*/
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#define TAMPER_DISABLE_RTCSPCLR() ((uint32_t)(TAMPER->TRIEN &= (~TAMPER_TRIEN_RTCSPCLREN_Msk)))
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/**
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* @brief Get Tamper Interrupt Flag
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*
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* @param None
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*
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* @retval 0 Tamper event Interrupt did not occur
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* @retval 1 Tamper event Interrupt occurred
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*
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* @details This macro indicates Tamper event intertupt occurred or not.
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*
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*/
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#define TAMPER_GET_INT_FLAG() ((TAMPER->INTSTS & (0xAA7FAFFF))? 1:0)
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/**
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* @brief Clear Tamper Interrupt Status
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*
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* @param[in] u32TamperFlag Tamper event interrupt flag. It consists of:
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* - \ref TAMPER_INTSTS_TAMP0IF_Msk
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* - \ref TAMPER_INTSTS_TAMP1IF_Msk
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* - \ref TAMPER_INTSTS_TAMP2IF_Msk
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* - \ref TAMPER_INTSTS_TAMP3IF_Msk
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* - \ref TAMPER_INTSTS_TAMP4IF_Msk
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* - \ref TAMPER_INTSTS_TAMP5IF_Msk
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* - \ref TAMPER_INTSTS_CLKFAILIF_Msk
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* - \ref TAMPER_INTSTS_CLKSTOPIF_Msk
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* - \ref TAMPER_INTSTS_OVPOUTIF_Msk
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* - \ref TAMPER_INTSTS_VGPEVIF_Msk
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* - \ref TAMPER_INTSTS_VGNEVIF_Msk
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* - \ref TAMPER_INTSTS_ACTSEIF_Msk
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* - \ref TAMPER_INTSTS_ACTST5IF_Msk
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* - \ref TAMPER_INTSTS_ACTST25IF_Msk
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* - \ref TAMPER_INTSTS_BODIF_Msk
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* - \ref TAMPER_INTSTS_ACTST1IF_Msk
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* - \ref TAMPER_INTSTS_ACTST3IF_Msk
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* - \ref TAMPER_INTSTS_ACTST21IF_Msk
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* - \ref TAMPER_INTSTS_ACTST23IF_Msk
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*
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* @return None
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*
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* @details This macro is used to clear Tamper event flag.
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*
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*/
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#define TAMPER_CLR_INT_STATUS(u32TamperFlag) (TAMPER->INTSTS = (u32TamperFlag))
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/**
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* @brief Get Tamper Interrupt Status
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*
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* @param None
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*
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* @retval TAMPER_INTSTS_TAMP0IF_Msk
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* @retval TAMPER_INTSTS_TAMP1IF_Msk
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* @retval TAMPER_INTSTS_TAMP2IF_Msk
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* @retval TAMPER_INTSTS_TAMP3IF_Msk
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* @retval TAMPER_INTSTS_TAMP4IF_Msk
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* @retval TAMPER_INTSTS_TAMP5IF_Msk
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* @retval TAMPER_INTSTS_CLKFAILIF_Msk
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* @retval TAMPER_INTSTS_CLKSTOPIF_Msk
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* @retval TAMPER_INTSTS_OVPOUTIF_Msk
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* @retval TAMPER_INTSTS_VGPEVIF_Msk
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* @retval TAMPER_INTSTS_VGNEVIF_Msk
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* @retval TAMPER_INTSTS_ACTSEFIF_Msk
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* @retval TAMPER_INTSTS_ACTST5IF_Msk
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* @retval TAMPER_INTSTS_ACTST25IF_Msk
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* @retval TAMPER_INTSTS_RTCLVRIF_Msk
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* @retval TAMPER_INTSTS_RIOTRIGIF_Msk
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* @retval TAMPER_INTSTS_RCLKTRIGIF_Msk
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* @retval TAMPER_INTSTS_BODIF_Msk
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* @retval TAMPER_INTSTS_ACTST1IF_Msk
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* @retval TAMPER_INTSTS_ACTST3IF_Msk
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* @retval TAMPER_INTSTS_ACTST21IF_Msk
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* @retval TAMPER_INTSTS_ACTST23IF_Msk
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*
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* @details This macro indicates Tamper event status.
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*
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*/
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#define TAMPER_GET_INT_STATUS() ((TAMPER->INTSTS & (0xAA7FAFFF)))
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void TAMPER_EnableInt(uint32_t u32IntFlagMask);
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void TAMPER_DisableInt(uint32_t u32IntFlagMask);
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void TAMPER_StaticTamperEnable(uint32_t u32TamperSelect, uint32_t u32DetecLevel, uint32_t u32DebounceEn);
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void TAMPER_StaticTamperDisable(uint32_t u32TamperSelect);
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void TAMPER_DynamicTamperEnable(uint32_t u32PairSel, uint32_t u32DebounceEn, uint32_t u32Pair1Source, uint32_t u32Pair2Source);
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void TAMPER_DynamicTamperDisable(uint32_t u32PairSel);
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void TAMPER_DynamicTamperConfig(uint32_t u32ChangeRate, uint32_t u32SeedReload, uint32_t u32RefPattern, uint32_t u32Seed);
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void TAMPER_ActiveShieldDynamicTamperEnable(uint32_t u32PairSel1, uint32_t u32Pair1Source1, uint32_t u32PairSel2, uint32_t u32Pair1Source2);
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void TAMPER_ActiveShieldDynamicTamperDisable(uint32_t u32PairSel1, uint32_t u32PairSe2);
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void TAMPER_ActiveShieldDynamicTamperConfig(uint32_t u32ChangeRate1, uint32_t u32SeedReload1, uint32_t u32RefPattern1, uint32_t u32Seed,
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uint32_t u32ChangeRate2, uint32_t u32SeedReload2, uint32_t u32RefPattern2, uint32_t u32Seed2);
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/**@}*/ /* end of group TAMPER_EXPORTED_FUNCTIONS */
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/**@}*/ /* end of group TAMPER_Driver */
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/**@}*/ /* end of group Standard_Driver */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __NU_TAMPER_H__ */
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