198 lines
5.1 KiB
ArmAsm
198 lines
5.1 KiB
ArmAsm
!********************************************************************************************************
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!
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! (c) Copyright 2005-2014, Andes Techonology
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! All Rights Reserved
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!
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! NDS32 Generic Port
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! GNU C Compiler
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!
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!********************************************************************************************************
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!********************************************************************************************************
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! INCLUDE ASSEMBLY CONSTANTS
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!********************************************************************************************************
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#include <nds32_init.inc>
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#include "nds32_defs.h"
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#include "os_cpu_common.h"
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#ifndef VECTOR_NUMINTRS
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#define VECTOR_NUMINTRS 32
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#endif
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.global OS_Init_Nds32
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.global OS_Int_Vectors
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.global OS_Int_Vectors_End
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.macro WEAK_DEFAULT weak_sym, default_handler
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.weak \weak_sym
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.set \weak_sym ,\default_handler
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.endm
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! Define standard NDS32 vector table entry point of
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! exception/interruption vectors
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.macro VECTOR handler
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WEAK_DEFAULT \handler, OS_Default_Exception
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.align 4
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__\handler:
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#ifdef MPU_SUPPORT
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la $p0, \handler
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jr5 $p0
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#else
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pushm $r0, $r5
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la $r0, \handler
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jr5 $r0
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#endif
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.endm
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.macro INTERRUPT_VECTOR num
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WEAK_DEFAULT OS_Trap_Interrupt_HW\num, OS_Default_Interrupt
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.align 4
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__OS_Trap_Interrupt_HW\num:
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#ifdef MPU_SUPPORT
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la $p1, OS_Trap_Interrupt_HW\num
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li $p0, \num
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jr5 $p1
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#else
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pushm $r0, $r5
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la $r1, OS_Trap_Interrupt_HW\num
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li $r0, \num
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jr5 $r1
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#endif
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.endm
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!********************************************************************************************************
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! Vector Entry Table
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!********************************************************************************************************
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.section .nds32_init, "ax"
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OS_Int_Vectors:
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b OS_Init_Nds32 ! (0) Trap Reset/NMI
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VECTOR OS_Trap_TLB_Fill ! (1) Trap TLB fill
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VECTOR OS_Trap_PTE_Not_Present ! (2) Trap PTE not present
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VECTOR OS_Trap_TLB_Misc ! (3) Trap TLB misc
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VECTOR OS_Trap_TLB_VLPT_Miss ! (4) Trap TLB VLPT miss
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VECTOR OS_Trap_Machine_Error ! (5) Trap Machine error
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VECTOR OS_Trap_Debug_Related ! (6) Trap Debug related
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VECTOR OS_Trap_General_Exception ! (7) Trap General exception
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VECTOR OS_Trap_Syscall ! (8) Syscall
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! Interrupt vectors
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.altmacro
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.set irqno, 0
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.rept VECTOR_NUMINTRS
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INTERRUPT_VECTOR %irqno
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.set irqno, irqno+1
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.endr
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.align 4
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OS_Int_Vectors_End:
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!******************************************************************************************************
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! Start Entry
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!******************************************************************************************************
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.section .text
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.global _start
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OS_Init_Nds32:
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_start:
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!************************** Begin of do-not-modify **************************
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! Please don't modify this code
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! Initialize the registers used by the compiler
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nds32_init ! NDS32 startup initial macro in <nds32_init.inc>
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!*************************** End of do-not-modify ***************************
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#ifdef CONFIG_HWZOL
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! enable AEN
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mfsr $r0, $PSW
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ori $r0, $r0, (1 << PSW_offAEN)
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mtsr $r0, $PSW
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#endif
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#if (defined(CONFIG_CPU_ICACHE_ENABLE) || defined(CONFIG_CPU_DCACHE_ENABLE))
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! disable cache
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mfsr $r0, $CACHE_CTL
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li $r1, ~(CACHE_CTL_mskIC_EN | CACHE_CTL_mskDC_EN)
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and $r0, $r0, $r1
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mtsr $r0, $CACHE_CTL
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#endif
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! Do system low level setup. It must be a leaf function.
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bal _nds32_init_mem
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#if 1 /* Speed prefer */
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! We do this on a word basis.
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! Currently, the default linker script guarantee
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! the __bss_start/_end boundary word-aligned.
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! Clear bss
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la $r0, __bss_start
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la $r1, _end
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sub $r2, $r1, $r0 ! $r2: Size of .bss
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beqz $r2, clear_end
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andi $r7, $r2, 0x1f ! $r7 = $r2 mod 32
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movi $r3, 0
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movi $r4, 0
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movi $r5, 0
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movi $r6, 0
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movi $r8, 0
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movi $r9, 0
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movi $r10, 0
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beqz $r7, clear_loop ! if $r7 == 0, bss_size%32 == 0
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sub $r2, $r2, $r7
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first_clear:
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swi.bi $r3, [$r0], #4 ! clear each word
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addi $r7, $r7, -4
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bnez $r7, first_clear
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li $r1, 0xffffffe0
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and $r2, $r2, $r1 ! check bss_size/32 == 0 or not
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beqz $r2, clear_end ! if bss_size/32 == 0 , needless to clear
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clear_loop:
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smw.bim $r3, [$r0], $r10 !clear each 8 words
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addi $r2, $r2, -32
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bgez $r2, clear_loop
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clear_end:
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#else /* Size prefer */
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! Clear bss
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la $r0, _edata
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la $r1, _end
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beq $r0, $r1, 2f
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li $r2, #0
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1:
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swi.bi $r2, [$r0], #4
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bne $r0, $r1, 1b
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2:
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#endif
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! Set-up the stack pointer
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la $sp, _stack
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! System reset handler
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bal reset
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! Default exceptions / interrupts handler
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OS_Default_Exception:
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OS_Default_Interrupt:
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die:
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b die
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!********************************************************************************************************
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! Interrupt vector Table
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!********************************************************************************************************
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.data
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.align 2
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! These tables contain the isr pointers used to deliver interrupts
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.global OS_CPU_Vector_Table
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OS_CPU_Vector_Table:
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.rept 32
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.long OS_Default_Interrupt
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.endr
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.end
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