ecf2d82159
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
90 lines
1.6 KiB
C
90 lines
1.6 KiB
C
#ifndef _LCD_CFG_H_
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#define _LCD_CFG_H_
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#include <stdint.h>
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#define COORD_Y_REVERSE (1<<0)
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#define COORD_X_REVERSE (1<<1)
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#define COORD_XY_EXCHANGE (1<<2)
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#define DEFAULT_LCD_CONFIG {\
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type: "rgb",\
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width:480,\
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height:272,\
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bits_pixel:18,\
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timing:\
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{\
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pixel_clock_hz:10000000,\
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h_front_porch:8,\
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h_back_porch:43,\
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h_sync_len:4,\
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v_front_porch:8,\
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v_back_porch:12,\
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v_sync_len:4,\
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h_sync_active:0,\
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v_sync_active:0,\
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den_active:1,\
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clk_active:1\
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},\
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swap_flag:0,\
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ctp_flag:0,\
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bl_mode:1,\
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bl_gpio_pin:GPIOB(6),\
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bl_gpio_level:1,\
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bl_pwm_name: "pwm",\
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bl_pwm_hz:1000,\
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bl_pwm_pol:0,\
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bl_pwm_val:60,\
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bl_pin:GPIOG(13),\
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bl_level:1,\
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pwr_pin:GPIOG(15),\
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pwr_level:1,\
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lane:4\
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}
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struct panel_timing
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{
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int pixel_clock_hz;
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int h_front_porch;
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int h_back_porch;
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int h_sync_len;
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int v_front_porch;
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int v_back_porch;
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int v_sync_len;
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int h_sync_active;
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int v_sync_active;
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int den_active;
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int clk_active;
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};
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typedef struct panel_timing *panel_timing_t;
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struct lcd_cfg_panel_info
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{
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rt_int8_t type[8];
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int width;
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int height;
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int bits_pixel;
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struct panel_timing timing;
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int swap_flag;
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int ctp_flag;
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int bl_mode;
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int bl_gpio_pin;
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int bl_gpio_level;
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rt_int8_t bl_pwm_name[8];
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int bl_pwm_hz;
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int bl_pwm_pol;
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int bl_pwm_val;
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int bl_pin;
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int bl_level;
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int pwr_pin;
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int pwr_level;
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int lane;
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};
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const struct lcd_cfg_panel_info* load_lcd_config_from_xml(void);
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#endif
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