f51bce3fed
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
75 lines
2.3 KiB
C
75 lines
2.3 KiB
C
/** @file reg_esm.h
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* @brief ESM Register Layer Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - Definitions
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* - Types
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* - Interface Prototypes
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* .
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* which are relevant for the ESM driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __REG_ESM_H__
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#define __REG_ESM_H__
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#include "sys_common.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* Esm Register Frame Definition */
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/** @struct esmBase
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* @brief Esm Register Frame Definition
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*
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* This type is used to access the Esm Registers.
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*/
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/** @typedef esmBASE_t
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* @brief Esm Register Frame Type Definition
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*
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* This type is used to access the Esm Registers.
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*/
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typedef volatile struct esmBase
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{
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uint32 EPENASET1; /* 0x0000 */
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uint32 EPENACLR1; /* 0x0004 */
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uint32 INTENASET1; /* 0x0008 */
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uint32 INTENACLR1; /* 0x000C */
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uint32 INTLVLSET1; /* 0x0010 */
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uint32 INTLVLCLR1; /* 0x0014 */
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uint32 ESTATUS1[3U]; /* 0x0018, 0x001C, 0x0020 */
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uint32 EPSTATUS; /* 0x0024 */
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uint32 INTOFFH; /* 0x0028 */
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uint32 INTOFFL; /* 0x002C */
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uint32 LTC; /* 0x0030 */
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uint32 LTCPRELOAD; /* 0x0034 */
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uint32 KEY; /* 0x0038 */
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uint32 ESTATUS2EMU; /* 0x003C */
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uint32 EPENASET4; /* 0x0040 */
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uint32 EPENACLR4; /* 0x0044 */
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uint32 INTENASET4; /* 0x0048 */
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uint32 INTENACLR4; /* 0x004C */
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uint32 INTLVLSET4; /* 0x0050 */
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uint32 INTLVLCLR4; /* 0x0054 */
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uint32 ESTATUS4[3U]; /* 0x0058, 0x005C, 0x0060 */
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uint32 ESTATUS5EMU; /* 0x0064 */
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} esmBASE_t;
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/** @def esmREG
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* @brief Esm Register Frame Pointer
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*
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* This pointer is used by the Esm driver to access the Esm registers.
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*/
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#define esmREG ((esmBASE_t *)0xFFFFF500U)
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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#endif
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