91 lines
3.7 KiB
C
91 lines
3.7 KiB
C
/*
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* @brief Quadrature Encoder Interface Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __QEI_001_H_
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#define __QEI_001_H_
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup IP_QEI_001 IP: QEI register block and driver
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* @ingroup IP_Drivers
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* Quadrature Encoder Interface
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* @{
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*/
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/**
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* @brief Quadrature Encoder Interface register block structure
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*/
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typedef struct { /*!< QEI Structure */
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__O uint32_t CON; /*!< Control register */
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__I uint32_t STAT; /*!< Encoder status register */
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__IO uint32_t CONF; /*!< Configuration register */
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__I uint32_t POS; /*!< Position register */
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__IO uint32_t MAXPOS; /*!< Maximum position register */
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__IO uint32_t CMPOS0; /*!< position compare register 0 */
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__IO uint32_t CMPOS1; /*!< position compare register 1 */
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__IO uint32_t CMPOS2; /*!< position compare register 2 */
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__I uint32_t INXCNT; /*!< Index count register */
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__IO uint32_t INXCMP0; /*!< Index compare register 0 */
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__IO uint32_t LOAD; /*!< Velocity timer reload register */
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__I uint32_t TIME; /*!< Velocity timer register */
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__I uint32_t VEL; /*!< Velocity counter register */
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__I uint32_t CAP; /*!< Velocity capture register */
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__IO uint32_t VELCOMP; /*!< Velocity compare register */
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__IO uint32_t FILTERPHA; /*!< Digital filter register on input phase A (QEI_A) */
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__IO uint32_t FILTERPHB; /*!< Digital filter register on input phase B (QEI_B) */
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__IO uint32_t FILTERINX; /*!< Digital filter register on input index (QEI_IDX) */
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__IO uint32_t WINDOW; /*!< Index acceptance window register */
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__IO uint32_t INXCMP1; /*!< Index compare register 1 */
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__IO uint32_t INXCMP2; /*!< Index compare register 2 */
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__I uint32_t RESERVED0[993];
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__O uint32_t IEC; /*!< Interrupt enable clear register */
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__O uint32_t IES; /*!< Interrupt enable set register */
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__I uint32_t INTSTAT; /*!< Interrupt status register */
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__I uint32_t IE; /*!< Interrupt enable register */
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__O uint32_t CLR; /*!< Interrupt status clear register */
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__O uint32_t SET; /*!< Interrupt status set register */
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} IP_QEI_001_Type;
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __QEI_001_H_ */
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