171 lines
5.5 KiB
C
171 lines
5.5 KiB
C
/*
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* @brief ADC Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "adc_001.h"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/* Configure clock for ADC */
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static void SetClock(IP_ADC_001_Type *pADC, uint32_t adcRate, uint32_t adcPerClock, uint8_t bitsAccuracy)
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{
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uint32_t temp, adcBitRate;
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/* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
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A/D converter, which should be less than or equal to 4.5MHz.
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A fully conversion requires (bits_accuracy+1) of these clocks.
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ADC clock = PCLK_ADC0 / (CLKDIV + 1);
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ADC rate = ADC clock / (bits_accuracy+1);
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*/
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adcBitRate = (adcRate * (11 - bitsAccuracy));
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/* Get the round value by fomular: (2*A + B)/(2*B) */
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temp = ((adcPerClock * 2 + adcBitRate) / (adcBitRate * 2)) - 1;
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/* Enable PDN bit and clock bits */
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pADC->CR &= ~(ADC_CR_CLKDIV(0xFF) | ADC_CR_BITACC(0x07));
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pADC->CR |= ADC_CR_CLKDIV(temp) | ADC_CR_BITACC(bitsAccuracy);
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}
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Initialize the ADC */
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void IP_ADC_Init(IP_ADC_001_Type *pADC, uint32_t adcRate, uint32_t adcPerClock, uint8_t bitsAccuracy)
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{
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pADC->INTEN = 0; /* Disable all interrupts */
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pADC->CR |= ADC_CR_PDN; /* Set PDN bit for ADC*/
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SetClock(pADC, adcRate, adcPerClock, bitsAccuracy);
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}
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/* Shutdown ADC */
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void IP_ADC_DeInit(IP_ADC_001_Type *pADC)
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{
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pADC->INTEN = 0x00000100;
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pADC->CR = 0;
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}
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/* Set burst mode for ADC */
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void IP_ADC_SetBurstMode(IP_ADC_001_Type *pADC, FunctionalState NewState)
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{
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if (NewState == DISABLE) {
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pADC->CR &= ~ADC_CR_BURST;
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}
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else {
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pADC->CR |= ADC_CR_BURST;
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}
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}
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/* Get the ADC value */
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Status IP_ADC_Get_Val(IP_ADC_001_Type *pADC, uint8_t channel, uint16_t *data)
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{
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uint32_t temp;
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temp = pADC->DR[channel];
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if (!ADC_DR_DONE(temp)) {
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return ERROR;
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}
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// if(ADC_DR_OVERRUN(temp) && (pADC->CR & ADC_CR_BURST))
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// return ERROR;
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*data = (uint16_t) ADC_DR_RESULT(temp);
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return SUCCESS;
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}
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/* Get ADC Channel status from ADC data register */
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FlagStatus IP_ADC_GetStatus(IP_ADC_001_Type *pADC, uint8_t channel, uint32_t StatusType)
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{
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switch (StatusType) {
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case ADC_DR_DONE_STAT:
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return (pADC->STAT & (1UL << channel)) ? SET : RESET;
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case ADC_DR_OVERRUN_STAT:
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channel += 8;
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return (pADC->STAT & (1UL << channel)) ? SET : RESET;
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case ADC_DR_ADINT_STAT:
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return pADC->STAT >> 16 ? SET : RESET;
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default:
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break;
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}
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return RESET;
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}
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/* Set the edge start condition */
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void IP_ADC_EdgeStartConfig(IP_ADC_001_Type *pADC, uint8_t edge_mode)
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{
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if (edge_mode) {
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pADC->CR |= ADC_CR_EDGE;
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}
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else {
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pADC->CR &= ~ADC_CR_EDGE;
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}
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}
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/* Enable/Disable ADC channel number */
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void IP_ADC_SetChannelNumber(IP_ADC_001_Type *pADC, uint8_t channel, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pADC->CR |= ADC_CR_CH_SEL(channel);
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}
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else {
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pADC->CR &= ~ADC_CR_START_MASK;
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pADC->CR &= ~ADC_CR_CH_SEL(channel);
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}
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}
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/* Set start mode for ADC */
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void IP_ADC_SetStartMode(IP_ADC_001_Type *pADC, uint8_t start_mode)
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{
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pADC->CR &= ~ADC_CR_START_MASK;
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pADC->CR |= ADC_CR_START_MODE_SEL((uint32_t) start_mode);
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}
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/* Enable/Disable interrupt for ADC channel */
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void IP_ADC_Int_Enable(IP_ADC_001_Type *pADC, uint8_t channel, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pADC->INTEN |= (1UL << channel);
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}
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else {
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pADC->INTEN &= (~(1UL << channel));
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}
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}
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