401 lines
13 KiB
C
401 lines
13 KiB
C
/** @file sys_vim.h
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* @brief Vectored Interrupt Module Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - VIM Type Definitions
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* - VIM General Definitions
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* .
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* which are relevant for Vectored Interrupt Controller.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __SYS_VIM_H__
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#define __SYS_VIM_H__
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#include "reg_vim.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* VIM Type Definitions */
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/** @typedef t_isrFuncPTR
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* @brief ISR Function Pointer Type Definition
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*
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* This type is used to access the ISR handler.
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*/
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typedef void (*t_isrFuncPTR)(void);
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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/* VIM General Configuration */
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#define VIM_CHANNELS 96U
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/* USER CODE BEGIN (2) */
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/* USER CODE END */
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/* Interrupt Handlers */
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extern void esmHighInterrupt(void);
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extern void phantomInterrupt(void);
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extern void rtiCompare3Interrupt(void);
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extern void linHighLevelInterrupt(void);
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/* USER CODE BEGIN (3) */
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/* USER CODE END */
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#define VIM_PARFLG (*(volatile uint32 *)0xFFFFFDECU)
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#define VIM_PARCTL (*(volatile uint32 *)0xFFFFFDF0U)
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#define VIM_ADDERR (*(volatile uint32 *)0xFFFFFDF4U)
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#define VIM_FBPARERR (*(volatile uint32 *)0xFFFFFDF8U)
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#define VIMRAMPARLOC (*(volatile uint32 *)0xFFF82400U)
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#define VIMRAMLOC (*(volatile uint32 *)0xFFF82000U)
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/* Configuration registers */
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typedef struct vim_config_reg
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{
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uint32 CONFIG_FIRQPR0;
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uint32 CONFIG_FIRQPR1;
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uint32 CONFIG_FIRQPR2;
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uint32 CONFIG_FIRQPR3;
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uint32 CONFIG_REQMASKSET0;
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uint32 CONFIG_REQMASKSET1;
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uint32 CONFIG_REQMASKSET2;
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uint32 CONFIG_REQMASKSET3;
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uint32 CONFIG_WAKEMASKSET0;
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uint32 CONFIG_WAKEMASKSET1;
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uint32 CONFIG_WAKEMASKSET2;
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uint32 CONFIG_WAKEMASKSET3;
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uint32 CONFIG_CAPEVT;
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uint32 CONFIG_CHANCTRL[24U];
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} vim_config_reg_t;
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/* Configuration registers initial value */
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#define VIM_FIRQPR0_CONFIGVALUE SYS_FIQ\
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| (SYS_FIQ << 1U)\
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| (SYS_IRQ << 2U)\
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| (SYS_IRQ << 3U)\
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| (SYS_IRQ << 4U)\
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| (SYS_IRQ << 5U)\
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| (SYS_IRQ << 6U)\
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| (SYS_IRQ << 7U)\
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| (SYS_IRQ << 8U)\
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| (SYS_IRQ << 9U)\
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| (SYS_IRQ << 10U)\
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| (SYS_IRQ << 11U)\
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| (SYS_IRQ << 12U)\
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| (SYS_IRQ << 13U)\
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| (SYS_IRQ << 14U)\
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| (SYS_IRQ << 15U)\
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| (SYS_IRQ << 16U)\
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| (SYS_IRQ << 17U)\
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| (SYS_IRQ << 18U)\
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| (SYS_IRQ << 19U)\
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| (SYS_IRQ << 20U)\
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| (SYS_IRQ << 21U)\
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| (SYS_IRQ << 22U)\
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| (SYS_IRQ << 23U)\
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| (SYS_IRQ << 24U)\
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| (SYS_IRQ << 25U)\
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| (SYS_IRQ << 26U)\
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| (SYS_IRQ << 27U)\
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| (SYS_IRQ << 28U)\
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| (SYS_IRQ << 29U)\
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| (SYS_IRQ << 30U)\
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| (SYS_IRQ << 31U)
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#define VIM_FIRQPR1_CONFIGVALUE SYS_IRQ\
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| (SYS_IRQ << 1U)\
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| (SYS_IRQ << 2U)\
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| (SYS_IRQ << 3U)\
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| (SYS_IRQ << 4U)\
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| (SYS_IRQ << 5U)\
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| (SYS_IRQ << 6U)\
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| (SYS_IRQ << 7U)\
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| (SYS_IRQ << 8U)\
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| (SYS_IRQ << 9U)\
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| (SYS_IRQ << 10U)\
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| (SYS_IRQ << 11U)\
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| (SYS_IRQ << 12U)\
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| (SYS_IRQ << 13U)\
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| (SYS_IRQ << 14U)\
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| (SYS_IRQ << 15U)\
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| (SYS_IRQ << 16U)\
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| (SYS_IRQ << 17U)\
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| (SYS_IRQ << 18U)\
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| (SYS_IRQ << 19U)\
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| (SYS_IRQ << 20U)\
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| (SYS_IRQ << 21U)\
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| (SYS_IRQ << 22U)\
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| (SYS_IRQ << 23U)\
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| (SYS_IRQ << 24U)\
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| (SYS_IRQ << 25U)\
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| (SYS_IRQ << 26U)\
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| (SYS_IRQ << 27U)\
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| (SYS_IRQ << 28U)\
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| (SYS_IRQ << 29U)\
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| (SYS_IRQ << 30U)\
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| (SYS_IRQ << 31U)
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#define VIM_FIRQPR2_CONFIGVALUE SYS_IRQ\
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| (SYS_IRQ << 1U)\
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| (SYS_IRQ << 2U)\
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| (SYS_IRQ << 3U)\
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| (SYS_IRQ << 4U)\
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| (SYS_IRQ << 5U)\
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| (SYS_IRQ << 6U)\
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| (SYS_IRQ << 7U)\
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| (SYS_IRQ << 8U)\
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| (SYS_IRQ << 9U)\
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| (SYS_IRQ << 10U)\
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| (SYS_IRQ << 11U)\
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| (SYS_IRQ << 12U)\
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| (SYS_IRQ << 13U)\
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| (SYS_IRQ << 14U)\
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| (SYS_IRQ << 15U)\
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| (SYS_IRQ << 16U)\
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| (SYS_IRQ << 17U)\
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| (SYS_IRQ << 18U)\
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| (SYS_IRQ << 19U)\
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| (SYS_IRQ << 20U)\
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| (SYS_IRQ << 21U)\
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| (SYS_IRQ << 22U)\
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| (SYS_IRQ << 23U)\
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| (SYS_IRQ << 24U)\
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| (SYS_IRQ << 25U)\
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| (SYS_IRQ << 26U)\
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| (SYS_IRQ << 27U)\
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| (SYS_IRQ << 28U)\
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| (SYS_IRQ << 29U)\
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| (SYS_IRQ << 30U)\
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| (SYS_IRQ << 31U)
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#define VIM_FIRQPR3_CONFIGVALUE SYS_IRQ\
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| (SYS_IRQ << 1U)\
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| (SYS_IRQ << 2U)\
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| (SYS_IRQ << 3U)\
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| (SYS_IRQ << 4U)\
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| (SYS_IRQ << 5U)\
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| (SYS_IRQ << 6U)\
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| (SYS_IRQ << 7U)\
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| (SYS_IRQ << 8U)\
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| (SYS_IRQ << 9U)\
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| (SYS_IRQ << 10U)\
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| (SYS_IRQ << 11U)\
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| (SYS_IRQ << 12U)\
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| (SYS_IRQ << 13U)\
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| (SYS_IRQ << 14U)\
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| (SYS_IRQ << 15U)\
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| (SYS_IRQ << 16U)\
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| (SYS_IRQ << 17U)\
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| (SYS_IRQ << 18U)\
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| (SYS_IRQ << 19U)\
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| (SYS_IRQ << 20U)\
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| (SYS_IRQ << 21U)\
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| (SYS_IRQ << 22U)\
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| (SYS_IRQ << 23U)\
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| (SYS_IRQ << 24U)\
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| (SYS_IRQ << 25U)\
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| (SYS_IRQ << 26U)\
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| (SYS_IRQ << 27U)\
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| (SYS_IRQ << 28U)\
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| (SYS_IRQ << 29U)\
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| (SYS_IRQ << 30U)\
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| (SYS_IRQ << 31U)
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#define VIM_REQMASKSET0_CONFIGVALUE 1U\
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| (1U << 1U)\
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| (0U << 2U)\
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| (0U << 3U)\
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| (0U << 4U)\
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| (1U << 5U)\
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| (0U << 6U)\
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| (0U << 7U)\
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| (0U << 8U)\
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| (0U << 9U)\
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| (0U << 10U)\
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| (0U << 11U)\
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| (0U << 12U)\
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| (1U << 13U)\
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| (0U << 14U)\
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| (0U << 15U)\
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| (0U << 16U)\
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| (0U << 17U)\
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| (0U << 18U)\
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| (0U << 19U)\
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| (0U << 20U)\
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| (0U << 21U)\
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| (0U << 22U)\
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| (0U << 23U)\
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| (0U << 24U)\
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| (0U << 25U)\
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| (0U << 26U)\
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| (0U << 27U)\
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| (0U << 28U)\
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| (0U << 29U)\
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| (0U << 30U)\
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| (0U << 31U)
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#define VIM_REQMASKSET1_CONFIGVALUE 0U\
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| (0U << 1U)\
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| (0U << 2U)\
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| (0U << 3U)\
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| (0U << 4U)\
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| (0U << 5U)\
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| (0U << 6U)\
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| (0U << 7U)\
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| (0U << 8U)\
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| (0U << 9U)\
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| (0U << 10U)\
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| (0U << 11U)\
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| (0U << 12U)\
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| (0U << 13U)\
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| (0U << 14U)\
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| (0U << 15U)\
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| (0U << 16U)\
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| (0U << 17U)\
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| (0U << 18U)\
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| (0U << 19U)\
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| (0U << 20U)\
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| (0U << 21U)\
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| (0U << 22U)\
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| (0U << 23U)\
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| (0U << 24U)\
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| (0U << 25U)\
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| (0U << 26U)\
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| (0U << 27U)\
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| (0U << 28U)\
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| (0U << 29U)\
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| (0U << 30U)\
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| (0U << 31U)
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#define VIM_REQMASKSET2_CONFIGVALUE 0U\
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| (0U << 1U)\
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| (0U << 2U)\
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| (0U << 3U)\
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| (0U << 4U)\
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| (0U << 5U)\
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| (0U << 6U)\
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| (0U << 7U)\
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| (0U << 8U)\
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| (0U << 9U)\
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| (0U << 10U)\
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| (0U << 11U)\
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| (0U << 12U)\
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| (0U << 13U)\
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| (0U << 14U)\
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| (0U << 15U)\
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| (0U << 16U)\
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| (0U << 17U)\
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| (0U << 18U)\
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| (0U << 19U)\
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| (0U << 20U)\
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| (0U << 21U)\
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| (0U << 22U)\
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| (0U << 23U)\
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| (0U << 24U)\
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| (0U << 25U)\
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| (0U << 26U)\
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| (0U << 27U)\
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| (0U << 28U)\
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| (0U << 29U)\
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| (0U << 30U)\
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| (0U << 31U)
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#define VIM_REQMASKSET3_CONFIGVALUE 0U\
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| (0U << 1U)\
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| (0U << 2U)\
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| (0U << 3U)\
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| (0U << 4U)\
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| (0U << 5U)\
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| (0U << 6U)\
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| (0U << 7U)\
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| (0U << 8U)\
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| (0U << 9U)\
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| (0U << 10U)\
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| (0U << 11U)\
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| (0U << 12U)\
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| (0U << 13U)\
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| (0U << 14U)\
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| (0U << 15U)\
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| (0U << 16U)\
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| (0U << 17U)\
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| (0U << 18U)\
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| (0U << 19U)\
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| (0U << 20U)\
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| (0U << 21U)\
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| (0U << 22U)\
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| (0U << 23U)\
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| (0U << 24U)\
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| (0U << 25U)\
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| (0U << 26U)\
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| (0U << 27U)\
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| (0U << 28U)\
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| (0U << 29U)\
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| (0U << 30U)\
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| (0U << 31U)
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#define VIM_WAKEMASKSET0_CONFIGVALUE 0xFFFFFFFFU
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#define VIM_WAKEMASKSET1_CONFIGVALUE 0xFFFFFFFFU
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#define VIM_WAKEMASKSET2_CONFIGVALUE 0xFFFFFFFFU
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#define VIM_WAKEMASKSET3_CONFIGVALUE 0U
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#define VIM_CAPEVT_CONFIGVALUE 0U
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#define VIM_CHANCTRL_CONFIGVALUE {0x00010203U,\
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0x04050607U,\
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0x08090A0BU,\
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0x0C0D0E0FU,\
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0x10111213U,\
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0x14151617U,\
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0x18191A1BU,\
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0x1C1D1E1FU,\
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0x20212223U,\
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0x24252627U,\
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0x28292A2BU,\
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0x2C2D2E2FU,\
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0x30313233U,\
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0x34353637U,\
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0x38393A3BU,\
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0x3C3D3E3FU,\
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0x40414243U,\
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0x44454647U,\
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0x48494A4BU,\
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0x4C4D4E4FU,\
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0x50515253U,\
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0x54555657U,\
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0x58595A5BU,\
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0x5C5D5E5FU}
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/**
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* @defgroup VIM VIM
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* @brief Vectored Interrupt Manager
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*
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* The vectored interrupt manager (VIM) provides hardware assistance for prioritizing and controlling the
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* many interrupt sources present on a device. Interrupts are caused by events outside of the normal flow of
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* program execution.
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*
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* Related files:
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* - reg_vim.h
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* - sys_vim.h
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* - sys_vim.c
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*
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* @addtogroup VIM
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* @{
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*/
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/*VIM Interface functions*/
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void vimInit(void);
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void vimChannelMap(uint32 request, uint32 channel, t_isrFuncPTR handler);
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void vimEnableInterrupt(uint32 channel, boolean inttype);
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void vimDisableInterrupt(uint32 channel);
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void vimGetConfigValue(vim_config_reg_t *config_reg, config_value_type_t type);
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/*@}*/
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#endif
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