ecf2d82159
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
49 lines
1.0 KiB
C
49 lines
1.0 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-09-10 GuEe-GUI first version
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*/
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#ifndef __CPUPORT_H__
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#define __CPUPORT_H__
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#include <rtdef.h>
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#define __WFI() __asm__ volatile ("wfi":::"memory")
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#define __WFE() __asm__ volatile ("wfe":::"memory")
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#define __SEV() __asm__ volatile ("sev")
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#define __ISB() __asm__ volatile ("isb 0xf":::"memory")
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#define __DSB() __asm__ volatile ("dsb 0xf":::"memory")
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#define __DMB() __asm__ volatile ("dmb 0xf":::"memory")
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#ifdef RT_USING_SMP
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typedef union {
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unsigned long slock;
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struct __arch_tickets {
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unsigned short owner;
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unsigned short next;
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} tickets;
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} rt_hw_spinlock_t;
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#endif
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rt_inline void rt_hw_isb(void)
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{
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__asm__ volatile ("isb":::"memory");
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}
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rt_inline void rt_hw_dmb(void)
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{
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__asm__ volatile ("dmb sy":::"memory");
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}
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rt_inline void rt_hw_dsb(void)
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{
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__asm__ volatile ("dsb sy":::"memory");
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}
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#endif /* __CPUPORT_H__ */
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