173 lines
4.1 KiB
C
173 lines
4.1 KiB
C
/*
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* Copyright (c) 2020-2020, Bluetrum Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-11-19 greedyhao first version
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*/
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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// #define DRV_DEBUG
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#define LOG_TAG "drv.gpio"
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#include <drv_log.h>
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struct port_info
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{
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uint8_t start_pin;
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uint8_t delta_pin;
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uint8_t total_pin;
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};
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/* It needs to be adjusted to the hardware. */
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static const struct port_info port_table[] =
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{
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{0, 8, 0}, /* PA0-PA7 */
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{0, 5, 8}, /* PB0-PB5 */
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{0, 8, 13}, /* PE0-PE7 */
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{0, 6, 21}, /* PF0-PF6 */
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};
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static const hal_sfr_t port_sfr[] =
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{
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GPIOA_BASE,
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GPIOB_BASE,
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GPIOE_BASE,
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GPIOF_BASE,
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};
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#define PIN_NUM(port, no) ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin))
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#define _PIN_PORT(pin) (uint8_t)(((pin) >> 3) & 0xFu)
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#define PIN_PORT(pin) ((port_table[_PIN_PORT(pin)].delta_pin == 8) ? _PIN_PORT(pin) : _PIN_PORT(pin) + 1)
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#define PORT_SFR(port) (port_sfr[(port)])
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#define PIN_NO(pin) (uint8_t)((pin) & 0xFu)
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// #define PIN_ABPIN(pin) (uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin))
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static rt_base_t ab32_pin_get(const char *name)
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{
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rt_base_t pin = 0;
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int hw_port_num, hw_pin_num = 0;
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int i, name_len;
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name_len = rt_strlen(name);
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if ((name_len < 4) || (name_len >= 6))
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{
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return -RT_EINVAL;
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}
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if ((name[0] != 'P') || (name[2] != '.'))
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{
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return -RT_EINVAL;
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}
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if ((name[1] >= 'A') && (name[1] <= 'B'))
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{
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hw_port_num = (int)(name[1] - 'A');
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}
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else if ((name[1] >= 'E') && (name[1] <= 'G'))
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{
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hw_port_num = (int)(name[1] - 'A') - 2; /* Without 'C' and 'D'. */
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}
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else
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{
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return -RT_EINVAL;
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}
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for (i = 3; i < name_len; i++)
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{
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hw_pin_num *= 10;
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hw_pin_num += name[i] - '0';
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}
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pin = PIN_NUM(hw_port_num, hw_pin_num);
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LOG_D("name=%s", name);
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LOG_D("hw_port_num=%d hw_pin_num=%d pin=%d", hw_port_num, hw_pin_num, pin);
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return pin;
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}
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static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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uint8_t port = PIN_PORT(pin);
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uint8_t gpio_pin = pin - port_table[port].total_pin;
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hal_gpio_write(PORT_SFR(port), gpio_pin, value);
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}
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static int ab32_pin_read(rt_device_t dev, rt_base_t pin)
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{
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uint8_t port = PIN_PORT(pin);
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uint8_t gpio_pin = pin - port_table[port].total_pin;
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return hal_gpio_read(PORT_SFR(port), gpio_pin);
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}
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static void ab32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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struct gpio_init gpio_init;
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uint8_t port = PIN_PORT(pin);
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gpio_init.pin = BIT(pin - port_table[port].total_pin);
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gpio_init.de = GPIO_DIGITAL;
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gpio_init.af_con = GPIO_AFDIS;
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LOG_D("port=%d pin=%d", port, gpio_init.pin);
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switch (mode)
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{
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case PIN_MODE_INPUT:
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case PIN_MODE_INPUT_PULLUP:
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gpio_init.pull = GPIO_PULLUP;
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gpio_init.dir = GPIO_DIR_INPUT;
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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gpio_init.pull = GPIO_PULLDOWN;
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gpio_init.dir = GPIO_DIR_INPUT;
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break;
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case PIN_MODE_OUTPUT:
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case PIN_MODE_OUTPUT_OD:
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default:
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gpio_init.pull = GPIO_NOPULL;
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gpio_init.dir = GPIO_DIR_OUTPUT;
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break;
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}
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hal_gpio_init(PORT_SFR(port), &gpio_init);
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}
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static rt_err_t ab32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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return -RT_ERROR;
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}
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static rt_err_t ab32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
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{
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return -RT_ERROR;
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}
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static rt_err_t ab32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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return -RT_ERROR;
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}
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const static struct rt_pin_ops _ab32_pin_ops =
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{
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ab32_pin_mode,
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ab32_pin_write,
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ab32_pin_read,
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ab32_pin_attach_irq,
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ab32_pin_dettach_irq,
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ab32_pin_irq_enable,
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ab32_pin_get,
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};
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int rt_hw_pin_init(void)
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{
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return rt_device_pin_register("pin", &_ab32_pin_ops, RT_NULL);
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}
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#endif
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