99 lines
4.1 KiB
C
99 lines
4.1 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-1-13 Wayne First version
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*
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******************************************************************************/
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#ifndef __SPINAND_H__
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#define __SPINAND_H__
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#include <rtthread.h>
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#include <drivers/mtd_nand.h>
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#include "drv_spi.h"
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#include <board.h>
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struct spinand_ops
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{
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rt_err_t (*block_erase)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
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uint8_t (*block_isbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
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rt_err_t (*block_markbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
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rt_err_t (*die_select)(struct rt_qspi_device *qspi, uint8_t select_die);
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rt_err_t (*jedecid_get)(struct rt_qspi_device *qspi, uint32_t *pu32ID);
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rt_err_t (*program_dataload)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff,
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uint32_t u32DataCount, uint8_t *pu8SpareBuff, uint32_t u32SpareCount);
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rt_err_t (*program_execute)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
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rt_err_t (*read_dataload)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
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rt_err_t (*read_quadoutput)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff, uint32_t u32DataCount);
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};
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typedef struct spinand_ops *nu_spinand_ops_t;
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#define SPINAND_FLASH_JEDECID g_spinandflash_dev.info.u32JEDECID
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#define SPINAND_FLASH_PAGE_SIZE g_spinandflash_dev.info.u16PageSize
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#define SPINAND_FLASH_OOB_SIZE g_spinandflash_dev.info.u16OOBSize
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#define SPINAND_FLASH_QUADREAD_CMDID g_spinandflash_dev.info.u8QuadReadCmdId
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#define SPINAND_FLASH_DUMMYBYTE g_spinandflash_dev.info.u8DummyByte
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#define SPINAND_FLASH_BLOCK_NUM g_spinandflash_dev.info.u32BlockPerFlash
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#define SPINAND_FLASH_PAGE_PER_BLOCK_NUM g_spinandflash_dev.info.u32PagePerBlock
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#define SPINAND_FLASH_DESCRIPTION g_spinandflash_dev.info.szDescription
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#define SPINAND_FLASH_MCP g_spinandflash_dev.info.u8IsDieSelect
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#define SPINAND_FLASH_INFO &g_spinandflash_dev.info
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#define SPINAND_FLASH_QSPI g_spinandflash_dev.qspi_device
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#define SPINAND_FLASH_LOCK &g_spinandflash_dev.lock
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#define SPINAND_FLASH_OPS g_spinandflash_dev.ops
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#define SPINAND_DIE_ID0 (0)
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#define SPINAND_DIE_ID1 (1)
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#define SPINAND_SPARE_LAYOUT_SIZE 16
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/* SPI NAND flash information */
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struct nu_spinand_info
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{
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uint32_t u32JEDECID;
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uint16_t u16PageSize;
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uint16_t u16OOBSize;
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uint8_t u8QuadReadCmdId;
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uint8_t u8ReadStatusCmdId;
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uint8_t u8WriteStatusCmdid;
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uint8_t u8StatusValue;
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uint8_t u8DummyByte;
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uint32_t u32BlockPerFlash;
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uint32_t u32PagePerBlock;
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uint8_t u8IsDieSelect;
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const char *szDescription;
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uint8_t au8DataLayout[SPINAND_SPARE_LAYOUT_SIZE];
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uint8_t au8EccLayout[SPINAND_SPARE_LAYOUT_SIZE];
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};
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typedef struct nu_spinand_info *nu_spinand_info_t;
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struct nu_spinand
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{
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struct nu_spinand_info info;
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struct rt_qspi_device *qspi_device;
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nu_spinand_ops_t ops;
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struct rt_mutex lock;
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};
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typedef struct nu_spinand *nu_spinand_t;
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rt_err_t rt_hw_mtd_spinand_register(const char *device_name);
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rt_size_t nu_qspi_transfer_message(struct rt_qspi_device *device, struct rt_qspi_message *message);
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rt_err_t nu_qspi_send_then_recv(struct rt_qspi_device *device, const void *send_buf, rt_size_t send_length, void *recv_buf, rt_size_t recv_length);
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rt_err_t nu_qspi_send(struct rt_qspi_device *device, const void *send_buf, rt_size_t length);
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rt_err_t spinand_flash_init(struct rt_qspi_device *qspi);
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extern struct nu_spinand g_spinandflash_dev;
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extern rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE];
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extern rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE];
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#endif /* __SPINAND_H__ */
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