449 lines
10 KiB
C
449 lines
10 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-12-27 iysheng first version
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* 2021-01-01 iysheng support exti interrupt
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* 2021-09-07 FuC Suit for V85XX
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* 2021-09-09 ZhuXW Add GPIO interrupt
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* 2021-09-12 ZhuXW Suit for V85XXP
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*/
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#include <board.h>
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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#if defined(GPIOF)
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#define __V85XXP_PORT_MAX 6u
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#elif defined(GPIOE)
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#define __V85XXP_PORT_MAX 5u
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#elif defined(GPIOD)
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#define __V85XXP_PORT_MAX 4u
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#elif defined(GPIOC)
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#define __V85XXP_PORT_MAX 3u
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#elif defined(GPIOB)
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#define __V85XXP_PORT_MAX 2u
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#elif defined(GPIOA)
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#define __V85XXP_PORT_MAX 1u
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#else
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#define __V85XXP_PORT_MAX 0u
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#error Unsupported V85XXP GPIO peripheral.
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#endif
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#define PIN_V85XXPPORT_MAX __V85XXP_PORT_MAX
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#define PIN_V85XXPPORT_A 0u
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static const struct pin_irq_map pin_irq_map[] =
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{
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#if defined(SOC_SERIES_V85XXP)
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{GPIO_Pin_0, PMU_IRQn},
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{GPIO_Pin_1, PMU_IRQn},
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{GPIO_Pin_2, PMU_IRQn},
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{GPIO_Pin_3, PMU_IRQn},
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{GPIO_Pin_4, PMU_IRQn},
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{GPIO_Pin_5, PMU_IRQn},
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{GPIO_Pin_6, PMU_IRQn},
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{GPIO_Pin_7, PMU_IRQn},
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{GPIO_Pin_8, PMU_IRQn},
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{GPIO_Pin_9, PMU_IRQn},
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{GPIO_Pin_10, PMU_IRQn},
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{GPIO_Pin_11, PMU_IRQn},
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{GPIO_Pin_12, PMU_IRQn},
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{GPIO_Pin_13, PMU_IRQn},
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{GPIO_Pin_14, PMU_IRQn},
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{GPIO_Pin_15, PMU_IRQn},
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#else
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#error "Unsupported soc series"
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#endif
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};
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static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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};
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static uint32_t pin_irq_enable_mask = 0;
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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static rt_base_t V85XXP_pin_get(const char *name)
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{
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rt_base_t pin = 0;
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int hw_port_num, hw_pin_num = 0;
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int i, name_len;
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name_len = rt_strlen(name);
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if ((name_len < 4) || (name_len >= 6))
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{
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return -RT_EINVAL;
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}
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if ((name[0] != 'P') || (name[2] != '.'))
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{
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return -RT_EINVAL;
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}
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if ((name[1] >= 'A') && (name[1] <= 'F'))
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{
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hw_port_num = (int)(name[1] - 'A');
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}
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else
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{
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return -RT_EINVAL;
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}
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for (i = 3; i < name_len; i++)
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{
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hw_pin_num *= 10;
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hw_pin_num += name[i] - '0';
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}
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pin = PIN_NUM(hw_port_num, hw_pin_num);
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return pin;
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}
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static void V85XXP_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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if (PIN_PORT(pin) == PIN_V85XXPPORT_A)
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{
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gpio_pin = PIN_V85XXPPIN(pin);
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GPIOA_WriteBit(GPIOA, gpio_pin, (BitState)value);
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}
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else if (PIN_PORT(pin) < PIN_V85XXPPORT_MAX)
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{
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gpio_port = PIN_V85XXPPORT(pin);
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gpio_pin = PIN_V85XXPPIN(pin);
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GPIOBToF_WriteBit(gpio_port, gpio_pin, (BitState)value);
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}
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}
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static rt_ssize_t V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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rt_ssize_t value = PIN_LOW;
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if (PIN_PORT(pin) == PIN_V85XXPPORT_A)
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{
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gpio_pin = PIN_V85XXPPIN(pin);
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value = GPIOA_ReadInputDataBit(GPIOA, gpio_pin);
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}
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else if (PIN_PORT(pin) < PIN_V85XXPPORT_MAX)
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{
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gpio_port = PIN_V85XXPPORT(pin);
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gpio_pin = PIN_V85XXPPIN(pin);
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value = GPIOBToF_ReadInputDataBit(gpio_port, gpio_pin);
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}
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return value;
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}
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static void V85XXP_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
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{
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GPIO_InitType GPIO_InitStruct = {0};
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if (PIN_PORT(pin) >= PIN_V85XXPPORT_MAX)
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{
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return;
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}
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/* Configure GPIO_InitStructure */
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GPIO_InitStruct.GPIO_Pin = PIN_V85XXPPIN(pin);
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INPUT;
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switch (mode)
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{
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case PIN_MODE_OUTPUT:
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_OUTPUT_CMOS;
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break;
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case PIN_MODE_INPUT:
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INPUT;
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break;
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case PIN_MODE_INPUT_PULLUP:
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INOUT_CMOS;
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INOUT_OD;
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break;
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case PIN_MODE_OUTPUT_OD:
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INOUT_OD;
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break;
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default:
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break;
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}
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if (PIN_PORT(pin) == PIN_V85XXPPORT_A)
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{
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GPIOA_Init(GPIOA, &GPIO_InitStruct);
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}
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else if (PIN_PORT(pin) < PIN_V85XXPPORT_MAX)
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{
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GPIOBToF_Init(PIN_V85XXPPORT(pin), &GPIO_InitStruct);
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}
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}
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rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
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{
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int i;
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for (i = 0; i < 32; i++)
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{
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if ((0x01 << i) == bit)
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{
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return i;
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}
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}
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return -1;
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}
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static rt_err_t V85XXP_pin_attach_irq(struct rt_device *device, rt_base_t pin,
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rt_uint8_t mode, void (*hdr)(void *args), void *args)
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{
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rt_base_t level;
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rt_int32_t irqindex = -1;
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if (PIN_PORT(pin) > PIN_V85XXPPORT_A)
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{
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return -RT_ENOSYS;
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}
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irqindex = bit2bitno(PIN_V85XXPPIN(pin));
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_ENOSYS;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == pin &&
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pin_irq_hdr_tab[irqindex].hdr == hdr &&
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pin_irq_hdr_tab[irqindex].mode == mode &&
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pin_irq_hdr_tab[irqindex].args == args)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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if (pin_irq_hdr_tab[irqindex].pin != -1)
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{
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rt_hw_interrupt_enable(level);
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return -RT_EBUSY;
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}
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pin_irq_hdr_tab[irqindex].pin = pin;
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pin_irq_hdr_tab[irqindex].hdr = hdr;
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pin_irq_hdr_tab[irqindex].mode = mode;
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pin_irq_hdr_tab[irqindex].args = args;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t V85XXP_pin_detach_irq(struct rt_device *device, rt_base_t pin)
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{
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rt_base_t level;
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rt_int32_t irqindex = -1;
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if (PIN_PORT(pin) > PIN_V85XXPPORT_A)
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{
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return -RT_ENOSYS;
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}
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irqindex = bit2bitno(PIN_V85XXPPIN(pin));
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_ENOSYS;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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pin_irq_hdr_tab[irqindex].pin = -1;
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pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
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pin_irq_hdr_tab[irqindex].mode = 0;
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pin_irq_hdr_tab[irqindex].args = RT_NULL;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t V85XXP_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
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{
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const struct pin_irq_map *irqmap;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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GPIO_InitType GPIO_InitStruct = {0};
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if (PIN_PORT(pin) > PIN_V85XXPPORT_A)
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{
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return -RT_ENOSYS;
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}
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GPIO_InitStruct.GPIO_Pin = PIN_V85XXPPIN(pin);
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if (enabled == PIN_IRQ_ENABLE)
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{
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irqindex = bit2bitno(PIN_V85XXPPIN(pin));
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return -RT_ENOSYS;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return -RT_ENOSYS;
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}
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.GPIO_Pin = PIN_V85XXPPIN(pin);
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GPIOA_Init(GPIOA, &GPIO_InitStruct);
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irqmap = &pin_irq_map[irqindex];
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switch (pin_irq_hdr_tab[irqindex].mode)
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{
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case PIN_IRQ_MODE_RISING:
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PMU_WakeUpPinConfig(PIN_V85XXPPIN(pin), IOA_RISING);
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break;
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case PIN_IRQ_MODE_FALLING:
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PMU_WakeUpPinConfig(PIN_V85XXPPIN(pin), IOA_FALLING);
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break;
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case PIN_IRQ_MODE_RISING_FALLING:
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PMU_WakeUpPinConfig(PIN_V85XXPPIN(pin), IOA_EDGEBOTH);
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break;
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case PIN_IRQ_MODE_HIGH_LEVEL:
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PMU_WakeUpPinConfig(PIN_V85XXPPIN(pin), IOA_HIGH);
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break;
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case PIN_IRQ_MODE_LOW_LEVEL:
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PMU_WakeUpPinConfig(PIN_V85XXPPIN(pin), IOA_LOW);
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break;
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default:
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break;
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}
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PMU_INTConfig(PMU_INT_IOAEN, ENABLE);
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NVIC_SetPriority(irqmap->irqno, 0);
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NVIC_EnableIRQ(irqmap->irqno);
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pin_irq_enable_mask |= irqmap->pinbit;
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rt_hw_interrupt_enable(level);
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}
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else if (enabled == PIN_IRQ_DISABLE)
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{
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level = rt_hw_interrupt_disable();
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PMU_INTConfig(PMU_INT_IOAEN, DISABLE);
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NVIC_DisableIRQ(irqmap->irqno);
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rt_hw_interrupt_enable(level);
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}
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else
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{
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return -RT_ENOSYS;
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops _V85XXP_pin_ops =
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{
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V85XXP_pin_mode,
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V85XXP_pin_write,
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V85XXP_pin_read,
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V85XXP_pin_attach_irq,
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V85XXP_pin_detach_irq,
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V85XXP_pin_irq_enable,
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V85XXP_pin_get,
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};
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rt_inline void pin_irq_hdr(int irqno)
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{
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if (pin_irq_hdr_tab[irqno].hdr)
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{
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pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
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}
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}
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void V85XXP_pin_exti_irqhandler()
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{
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rt_base_t intsts=0;
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int i=0;
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intsts = PMU_GetIOAAllINTStatus();
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for(i=0; i<16; i++)
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{
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if((1<<i) & intsts)
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{
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PMU_ClearIOAINTStatus(1<<i);
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pin_irq_hdr(bit2bitno(1<<i));
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return;
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}
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}
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}
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void PMU_IRQHandler()
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{
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rt_interrupt_enter();
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V85XXP_pin_exti_irqhandler();
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rt_interrupt_leave();
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}
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int rt_hw_pin_init(void)
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{
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GPIO_InitType GPIO_InitStruct;
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GPIO_InitStruct.GPIO_Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_All;
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#if defined(GPIOF)
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GPIOBToF_Init(GPIOF, &GPIO_InitStruct);
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#endif
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#if defined(GPIOE)
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GPIOBToF_Init(GPIOE, &GPIO_InitStruct);
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#endif
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#if defined(GPIOD)
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GPIOBToF_Init(GPIOD, &GPIO_InitStruct);
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#endif
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#if defined(GPIOC)
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GPIOBToF_Init(GPIOC, &GPIO_InitStruct);
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#endif
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#if defined(GPIOB)
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GPIOBToF_Init(GPIOB, &GPIO_InitStruct);
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#endif
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#if defined(GPIOA)
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GPIOA_Init(GPIOA, &GPIO_InitStruct);
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#endif
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return rt_device_pin_register("pin", &_V85XXP_pin_ops, RT_NULL);
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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#endif /* RT_USING_PIN */
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