86 lines
2.7 KiB
C
86 lines
2.7 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-28 shelton first version
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*/
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#include "board.h"
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void system_clock_config(void)
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{
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/* enable pwc periph clock */
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crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
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/* config ldo voltage */
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pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
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/* set the flash clock divider */
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flash_clock_divider_set(FLASH_CLOCK_DIV_3);
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/* reset crm */
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crm_reset();
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crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
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/* wait till hext is ready */
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while(crm_hext_stable_wait() == ERROR)
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{
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}
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/* config pll clock resource
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common frequency config list: pll source selected hick or hext(8mhz)
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_______________________________________________________________________________________
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| | | | | | | | | |
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|pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
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|________|_________|_________|_________|_________|_________|_________|_________________|
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| | | | | | | | | |
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|pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
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| | | | | | | | | |
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|pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
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|pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
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|________|_________|_________|_________|_________|_________|_________|________|________|
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if pll clock source selects hext with other frequency values, or configure pll to other
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frequency values, please use the at32 new clock configuration tool for configuration. */
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crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
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/* enable pll */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
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/* wait till pll is ready */
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while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
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{
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}
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/* config ahbclk */
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crm_ahb_div_set(CRM_AHB_DIV_1);
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/* config apb2clk */
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crm_apb2_div_set(CRM_APB2_DIV_2);
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/* config apb1clk */
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crm_apb1_div_set(CRM_APB1_DIV_2);
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/* enable auto step mode */
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crm_auto_step_mode_enable(TRUE);
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/* select pll as system clock source */
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crm_sysclk_switch(CRM_SCLK_PLL);
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/* wait till pll is used as system clock source */
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while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
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{
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}
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/* disable auto step mode */
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crm_auto_step_mode_enable(FALSE);
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/* update system_core_clock global variable */
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system_core_clock_update();
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}
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