rt-thread/bsp/lpc43xx
Meco Man ddccef3a64 modify RT_ALIGN_SIZE as 8 by default 2023-01-12 22:47:23 -05:00
..
Libraries format Kconfig and sconscript 2023-01-08 22:52:13 -05:00
M0 modify RT_ALIGN_SIZE as 8 by default 2023-01-12 22:47:23 -05:00
M4 modify RT_ALIGN_SIZE as 8 by default 2023-01-12 22:47:23 -05:00
drivers format Kconfig and sconscript 2023-01-08 22:52:13 -05:00
bin2C.py lpc43xx: output a newline in the header file 2015-01-06 11:03:01 +08:00
readme.txt lpc43xx: add readme 2015-01-06 10:46:32 +08:00

readme.txt

1. M4 run on flash bank A. M0 run on flash bank B and the binary code of M0 is
   embedded into the code of M4.
3. Compile the project in M0/ first and then compile the project in M4/. Then
   flash it into the chip with JLink.