147 lines
3.4 KiB
C
147 lines
3.4 KiB
C
/*
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-09-05 qinweizhong add support for tae32
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*/
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#include "board.h"
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#define _SCB_BASE (0xE000E010UL)
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#define _SYSTICK_CTRL (*(rt_uint32_t *)(_SCB_BASE + 0x0))
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#define _SYSTICK_LOAD (*(rt_uint32_t *)(_SCB_BASE + 0x4))
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#define _SYSTICK_VAL (*(rt_uint32_t *)(_SCB_BASE + 0x8))
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#define _SYSTICK_CALIB (*(rt_uint32_t *)(_SCB_BASE + 0xC))
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#define _SYSTICK_PRI (*(rt_uint8_t *)(0xE000ED23UL))
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static uint32_t _SysTick_Config(rt_uint32_t ticks)
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{
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if ((ticks - 1) > 0xFFFFFF)
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{
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return 1;
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}
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_SYSTICK_LOAD = ticks - 1;
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_SYSTICK_PRI = 0x01;
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_SYSTICK_VAL = 0;
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_SYSTICK_CTRL = 0x07;
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return 0;
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}
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#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
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#define RT_HEAP_SIZE 2048
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static uint32_t rt_heap[RT_HEAP_SIZE];/* heap default size: 4K(1024 * 4)*/
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RT_WEAK void *rt_heap_begin_get(void)
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{
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return rt_heap;
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}
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RT_WEAK void *rt_heap_end_get(void)
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{
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return rt_heap + RT_HEAP_SIZE;
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}
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#endif
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/**
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* This function will initial your board.
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*/
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void rt_hw_board_init()
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{
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/* System Clock Update */
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SystemClock_Config();
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/* System Tick Configuration */
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LL_Init();
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_SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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/* Call components board initial (use INIT_BOARD_EXPORT()) */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
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rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
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#endif
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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}
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void rt_hw_console_output(const char *str)
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{
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rt_size_t i = 0, size = 0;
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char a = '\r';
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size = rt_strlen(str);
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for (i = 0; i < size; i++)
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{
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if (*(str + i) == '\n')
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{
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/*Wait TXFIFO to be no full*/
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while (!__LL_UART_IsTxFIFONotFull(UART0)) {};
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/*Send data to UART*/
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__LL_UART_TxBuf9bits_Write(UART0, (uint16_t)a);
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}
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while (!__LL_UART_IsTxFIFONotFull(UART0)) {};
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/*Send data to UART*/
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__LL_UART_TxBuf9bits_Write(UART0, (uint16_t)(*(str + i)));
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}
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}
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char rt_hw_console_getchar(void)
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{
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/* note: ch default value < 0 */
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int ch = -1;
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if (__LL_UART_IsDatReady(UART0))
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{
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/* receive data */
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ch = __LL_UART_RxBuf9bits_Read(UART0);
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}
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else
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{
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rt_thread_mdelay(10);
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}
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return ch;
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}
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void SystemClock_Config(void)
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{
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LL_StatusETypeDef ret;
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SYSCTRL_SysclkUserCfgTypeDef sysclk_cfg;
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/*FPLL0 Init*/
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LL_FPLL_Init(FPLL0);
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/*SYSCLK Clock Config*/
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sysclk_cfg.sysclk_src = SYSCLK_SRC_PLL0DivClk;
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sysclk_cfg.sysclk_freq = 90000000UL;
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sysclk_cfg.pll0clk_src = PLLCLK_SRC_XOSC;
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sysclk_cfg.pll0clk_src_freq = HSE_VALUE;
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sysclk_cfg.apb0_clk_div = SYSCTRL_CLK_DIV_1;
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sysclk_cfg.apb1_clk_div = SYSCTRL_CLK_DIV_1;
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ret = LL_SYSCTRL_SysclkInit(SYSCTRL, &sysclk_cfg);
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if (ret == LL_OK)
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{
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SystemCoreClockUpdate(sysclk_cfg.sysclk_freq);
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}
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/*eFlash Memory CLK Source and Div Config*/
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LL_SYSCTRL_EFLASH_ClkCfg(EFLASH_CLK_SRC_PLL0DivClk, SYSCTRL_CLK_DIV_9);
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}
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