960 lines
32 KiB
C
960 lines
32 KiB
C
/**************************************************************************//**
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* @file lcd.c
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* @brief N9H30 LCD driver source file
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <math.h>
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#include "N9H30.h"
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#include "nu_sys.h"
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#include "nu_lcd.h"
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/** @addtogroup N9H30_Device_Driver N9H30 Device Driver
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@{
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*/
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/** @addtogroup N9H30_LCD_Driver LCD Driver
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@{
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*/
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/** @addtogroup N9H30_LCD_EXPORTED_CONSTANTS LCD Exported Constants
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@{
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*/
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/// @cond HIDDEN_SYMBOLS
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/* LCD attributes */
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static VPOST_T DEF_E50A2V1 =
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{
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800, /*!< Panel width */
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480, /*!< Panel height */
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0, /*!< MPU command line low indicator */
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0, /*!< MPU command width */
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0, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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0, /*!< MPU mode */
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VPOSTB_COLORTYPE_64K, /*!< Display colors */
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VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
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0x020d03a0, /*!< CRTCSIZE register value */
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0x01e00320, /*!< CRTCDEND register value */
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0x03250321, /*!< CRTCHR register value */
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0x03780348, /*!< CRTCHSYNC register value */
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0x01f001ed /*!< CRTCVR register value */
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};
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static VPOST_T DEF_ILI9341_MPU80 =
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{
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240, /*!< Panel width */
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320, /*!< Panel height */
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VPOSTB_CMDLOW, /*!< MPU command line low indicator */
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VPOSTB_CM16t18HIGH, /*!< MPU command width */
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VPOSTB_CMD8, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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VPOSTB_MPU80, /*!< MPU mode */
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VPOSTB_COLORTYPE_64K, /*!< Display colors */
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VPOSTB_DEVICE_MPU, /*!< Type of display panel */
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0x01600100, /*!< CRTCSIZE register value */
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0x014000F0, /*!< CRTCDEND register value */
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0x00FA00F5, /*!< CRTCHR register value */
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0x00FC00FA, /*!< CRTCHSYNC register value */
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0x01500145 /*!< CRTCVR register value */
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};
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static VPOST_T DEF_LSA40AT9001 =
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{
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800, /*!< Panel width */
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600, /*!< Panel height */
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0, /*!< MPU command line low indicator */
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0, /*!< MPU command width */
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0, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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0, /*!< MPU mode */
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VPOSTB_COLORTYPE_64K, /*!< Display colors */
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VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
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0x02800425, /*!< CRTCSIZE register value */
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0x02580320, /*!< CRTCDEND register value */
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0x032F032A, /*!< CRTCHR register value */
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0x0334032A, /*!< CRTCHSYNC register value */
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0x026C0262 /*!< CRTCVR register value */
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};
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static VPOST_T DEF_FW070TFT =
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{
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800, /*!< Panel width */
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480, /*!< Panel height */
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0, /*!< MPU command line low indicator */
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0, /*!< MPU command width */
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0, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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0, /*!< MPU mode */
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VPOSTB_COLORTYPE_16M, /*!< Display colors */
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VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
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0x020d0420, /*!< CRTCSIZE register value */
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0x01e00320, /*!< CRTCDEND register value */
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0x033e0339, /*!< CRTCHR register value */
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0x040c03f8, /*!< CRTCHSYNC register value */
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0x020001f6 /*!< CRTCVR register value */
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};
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#define FW043TFT_WIDTH 480 /*!< XRES */
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#define FW043TFT_HEIGHT 272 /*!< YRES */
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#define FW043TFT_MARGIN_LEFT 30 /*!< HBP (Horizontal Back Porch) */
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#define FW043TFT_MARGIN_RIGHT 5 /*!< HFP (Horizontal Front Porch) */
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#define FW043TFT_MARGIN_UPPER 2 /*!< VBP (Vertical Back Porch) */
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#define FW043TFT_MARGIN_LOWER 27 /*!< VFP (Vertical Front Porch) */
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#define FW043TFT_HSYNC_LEN 41 /*!< HPW (HSYNC plus width) */
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#define FW043TFT_VSYNC_LEN 10 /*!< VPW (VSYNC width) */
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static VPOST_T DEF_FW043TFT =
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{
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FW043TFT_WIDTH, /*!< Panel width */
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FW043TFT_HEIGHT, /*!< Panel height */
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0, /*!< MPU command line low indicator */
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0, /*!< MPU command width */
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0, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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0, /*!< MPU mode */
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VPOSTB_COLORTYPE_16M, /*!< Display colors */
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VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
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.sCRTCSIZE =
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{
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/*!< Horizontal Total */
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.HTT = FW043TFT_MARGIN_LEFT + FW043TFT_WIDTH + FW043TFT_MARGIN_RIGHT,
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/*!< Vertical Total */
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.VTT = FW043TFT_MARGIN_UPPER + FW043TFT_HEIGHT + FW043TFT_MARGIN_LOWER,
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},
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.sCRTCDEND =
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{
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/*!< Horizontal Display Enable End */
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.HDEND = FW043TFT_WIDTH,
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/*!< Vertical Display Enable End */
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.VDEND = FW043TFT_HEIGHT,
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},
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.sCRTCHR =
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{
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/*!< Internal Horizontal Retrace Start Timing */
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.HRS = FW043TFT_WIDTH + 1,
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/*!< Internal Horizontal Retrace End Low */
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.HRE = FW043TFT_WIDTH + 5,
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},
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.sCRTCHSYNC =
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{
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/*!< Horizontal Sync Start Timing */
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.HSYNC_S = FW043TFT_WIDTH + FW043TFT_MARGIN_LEFT,
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/*!< Horizontal Sync End Timing */
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.HSYNC_E = FW043TFT_WIDTH + FW043TFT_MARGIN_LEFT + FW043TFT_HSYNC_LEN,
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/*!< Hsync Signal Adjustment For Multi-Cycles Per Pixel Mode Of Sync-Based Unipac-LCD */
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.HSYNC_SHIFT = 0,
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},
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.sCRTCVR =
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{
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/*!< Vertical Internal Retrace Start Timing */
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.VRS = FW043TFT_HEIGHT + FW043TFT_MARGIN_UPPER,
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/*!< Vertical Internal Retrace End Low */
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.VRE = FW043TFT_HEIGHT + FW043TFT_MARGIN_UPPER + FW043TFT_VSYNC_LEN,
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}
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};
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#define FW070TFT_WSVGA_WIDTH 1024 /*!< XRES */
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#define FW070TFT_WSVGA_HEIGHT 600 /*!< YRES */
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#define FW070TFT_WSVGA_MARGIN_LEFT 160 /*!< HBP (Horizontal Back Porch) */
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#define FW070TFT_WSVGA_MARGIN_RIGHT 160 /*!< HFP (Horizontal Front Porch) */
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#define FW070TFT_WSVGA_MARGIN_UPPER 12 /*!< VBP (Vertical Back Porch) */
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#define FW070TFT_WSVGA_MARGIN_LOWER 23 /*!< VFP (Vertical Front Porch) */
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#define FW070TFT_WSVGA_HSYNC_LEN 1 /*!< HPW (HSYNC plus width) */
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#define FW070TFT_WSVGA_VSYNC_LEN 1 /*!< VPW (VSYNC width) */
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static VPOST_T DEF_FW070TFT_WSVGA =
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{
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FW070TFT_WSVGA_WIDTH, /*!< Panel width */
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FW070TFT_WSVGA_HEIGHT, /*!< Panel height */
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0, /*!< MPU command line low indicator */
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0, /*!< MPU command width */
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0, /*!< MPU bus width */
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VPOSTB_DATA16or18, /*!< Display bus width */
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0, /*!< MPU mode */
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VPOSTB_COLORTYPE_16M, /*!< Display colors */
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VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
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.sCRTCSIZE =
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{
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/*!< Horizontal Total */
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.HTT = FW070TFT_WSVGA_MARGIN_LEFT + FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_RIGHT,
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/*!< Vertical Total */
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.VTT = FW070TFT_WSVGA_MARGIN_UPPER + FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_LOWER,
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},
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.sCRTCDEND =
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{
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/*!< Horizontal Display Enable End */
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.HDEND = FW070TFT_WSVGA_WIDTH,
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/*!< Vertical Display Enable End */
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.VDEND = FW070TFT_WSVGA_HEIGHT,
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},
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.sCRTCHR =
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{
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/*!< Internal Horizontal Retrace Start Timing */
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.HRS = FW070TFT_WSVGA_WIDTH + 1,
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/*!< Internal Horizontal Retrace End Low */
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.HRE = FW070TFT_WSVGA_WIDTH + 5,
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},
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.sCRTCHSYNC =
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{
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/*!< Horizontal Sync Start Timing */
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.HSYNC_S = FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_LEFT,
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/*!< Horizontal Sync End Timing */
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.HSYNC_E = FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_LEFT + FW070TFT_WSVGA_HSYNC_LEN,
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/*!< Hsync Signal Adjustment For Multi-Cycles Per Pixel Mode Of Sync-Based Unipac-LCD */
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.HSYNC_SHIFT = 0,
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},
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.sCRTCVR =
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{
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/*!< Vertical Internal Retrace Start Timing */
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.VRS = FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_UPPER,
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/*!< Vertical Internal Retrace End Low */
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.VRE = FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_UPPER + FW070TFT_WSVGA_VSYNC_LEN,
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}
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};
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/* LCD build-in support list */
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static VPOST_T *DisplayDevList[DIS_PANEL_CNT] =
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{
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&DEF_E50A2V1,
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&DEF_ILI9341_MPU80,
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&DEF_LSA40AT9001,
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&DEF_FW070TFT,
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&DEF_FW043TFT,
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&DEF_FW070TFT_WSVGA
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};
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static VPOST_T curDisplayDev;
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static OSDFORMATEX curOSDDev = {0};
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static LCDFORMATEX curVADev = {0};
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/// @endcond /* HIDDEN_SYMBOLS */
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/*@}*/ /* end of group N9H30_I2C_EXPORTED_CONSTANTS */
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/** @addtogroup N9H30_LCD_EXPORTED_FUNCTIONS LCD Exported Functions
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@{
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*/
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/// @cond HIDDEN_SYMBOLS
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/* For align 32 */
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static uint32_t shift_pointer(uint32_t ptr, uint32_t align)
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{
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uint32_t alignedPTR;
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uint32_t remain;
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//printf("pointer position is %x\n",ptr);
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if ((ptr % align) != 0)
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{
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remain = ptr % align;
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alignedPTR = ptr + (align - remain);
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return alignedPTR;
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}
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return ptr;
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}
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/// @endcond /* HIDDEN_SYMBOLS */
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/**
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* @brief Configure attributes of LCD panel,install interrupt handler and enable LCD engine clock
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* @param[in] u32DisplayPanelID is panel id to configure.
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* @return none
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*/
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void vpostLCMInit(uint32_t u32DisplayPanelID)
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{
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// enable lcd engine clock
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outpw(REG_CLK_HCLKEN, inpw(REG_CLK_HCLKEN) | (1 << 25));
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memset((void *)&curDisplayDev, 0, sizeof(curDisplayDev));
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memcpy((void *)&curDisplayDev, DisplayDevList[u32DisplayPanelID], sizeof(curDisplayDev));
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outpw(REG_LCM_DEV_CTRL, curDisplayDev.u32CmdLow
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| curDisplayDev.u32Cmd16t18
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| curDisplayDev.u32CmdBusWidth
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| curDisplayDev.u32DataBusWidth
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| curDisplayDev.u32MPU_Mode
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| curDisplayDev.u32DisplayColors
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| curDisplayDev.u32DevType);
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outpw(REG_LCM_CRTC_SIZE, curDisplayDev.u32Reg_CRTCSIZE);
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outpw(REG_LCM_CRTC_DEND, curDisplayDev.u32Reg_CRTCDEND);
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outpw(REG_LCM_CRTC_HR, curDisplayDev.u32Reg_CRTCHR);
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outpw(REG_LCM_CRTC_HSYNC, curDisplayDev.u32Reg_CRTCHSYNC);
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outpw(REG_LCM_CRTC_VR, curDisplayDev.u32Reg_CRTCVR);
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}
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/**
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* @brief Query LCM capacity and configuration by ID
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* @param[in] u32DisplayPanelID is panel id to configure.
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* @return LCM instance
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*/
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VPOST_T *vpostLCMGetInstance(uint32_t u32DisplayPanelID)
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{
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if (u32DisplayPanelID > (sizeof(DisplayDevList) / sizeof(VPOST_T *)))
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return NULL;
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return DisplayDevList[u32DisplayPanelID];
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}
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/**
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* @brief Disable LCD engine
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* @param none
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* @return none
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*/
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void vpostLCMDeinit(void)
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{
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// disable lcd engine clock
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outpw(REG_CLK_HCLKEN, inpw(REG_CLK_HCLKEN) & ~(1 << 25));
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//sysDisableInterrupt(LCD_IRQn);
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}
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/**
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* @brief Get the pointer of frame buffer
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* @param none
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* @return pointer of frame buffer
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* @retval NULL fail.
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* @note before calling this function, display width, height and source format must be set first.
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*/
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uint8_t *vpostGetFrameBuffer(void)
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{
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uint8_t *u8BufPtr;
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uint8_t u32BytePerPixel;
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if ((curDisplayDev.u32DevWidth == 0) || (curDisplayDev.u32DevHeight == 0))
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return NULL;
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switch (curVADev.ucVASrcFormat)
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{
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case VA_SRC_YUV422:
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case VA_SRC_YCBCR422:
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case VA_SRC_RGB565:
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u32BytePerPixel = 2;
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break;
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case VA_SRC_RGB666:
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case VA_SRC_RGB888:
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u32BytePerPixel = 4;
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break;
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default:
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u32BytePerPixel = 2;
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}
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u8BufPtr = (uint8_t *)malloc((curDisplayDev.u32DevWidth * curDisplayDev.u32DevHeight * u32BytePerPixel) + 32);
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if (u8BufPtr == NULL)
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return NULL;
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u8BufPtr = (uint8_t *)shift_pointer((uint32_t)u8BufPtr, 32);
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outpw(REG_LCM_VA_BADDR0, (uint32_t)((uint32_t)u8BufPtr | 0x80000000));
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outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~(1 << 30) & ~VPOSTB_DB_EN);
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return (uint8_t *)((uint32_t)u8BufPtr | 0x80000000);
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}
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void vpostSetFrameBuffer(uint8_t *pu8BufPtr)
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{
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outpw(REG_LCM_VA_BADDR0, (uint32_t)((uint32_t)pu8BufPtr | 0x80000000));
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outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~(1 << 30) & ~VPOSTB_DB_EN);
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}
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/**
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* @brief Get the pointer of frame buffer
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* @param[in] u32Cnt is the frame buffer count to allocate. Min value is 1.
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* @return pointer of frame buffer
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* @retval NULL fail.
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* @note before calling this function, display width, height and source format must be set first.
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*/
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uint8_t *vpostGetMultiFrameBuffer(uint32_t u32Cnt)
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{
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uint8_t *u8BufPtr;
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uint8_t u32BytePerPixel;
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if ((curDisplayDev.u32DevWidth == 0) || (curDisplayDev.u32DevHeight == 0) || (u32Cnt == 0))
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return NULL;
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switch (curVADev.ucVASrcFormat)
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{
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case VA_SRC_YUV422:
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case VA_SRC_YCBCR422:
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case VA_SRC_RGB565:
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u32BytePerPixel = 2;
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break;
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case VA_SRC_RGB666:
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case VA_SRC_RGB888:
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u32BytePerPixel = 4;
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break;
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default:
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u32BytePerPixel = 2;
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}
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u8BufPtr = (uint8_t *)malloc((curDisplayDev.u32DevWidth * curDisplayDev.u32DevHeight * u32BytePerPixel) * u32Cnt + 32);
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if (u8BufPtr == NULL)
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return NULL;
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u8BufPtr = (uint8_t *)shift_pointer((uint32_t)u8BufPtr, 32);
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outpw(REG_LCM_VA_BADDR0, (uint32_t)((uint32_t)u8BufPtr | 0x80000000));
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outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~(1 << 30) & ~VPOSTB_DB_EN);
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return (uint8_t *)((uint32_t)u8BufPtr | 0x80000000);
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}
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/**
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* @brief Set active display window
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* @param[in] u16StartY is y start position
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* @param[in] u16EndY is y end position
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* @param[in] u8BGColorR is background R color
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* @param[in] u8BGColorG is background G color
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* @param[in] u8BGColorB is background B color
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* @return none
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*/
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void vpostSetActiveWindow(uint16_t u16StartY, uint16_t u16EndY, uint8_t u8BGColorR, uint8_t u8BGColorG, uint8_t u8BGColorB)
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{
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outpw(REG_LCM_VA_WIN, (u16StartY << 16) | u16EndY);
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outpw(REG_LCM_VA_STUFF, (u8BGColorR << 16) | (u8BGColorG << 8) | u8BGColorB);
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}
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/**
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* @brief Configure LCD display mode
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* @param[in] u8DisplayMode is display mode, value could be
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* - \ref VPOST_DISPLAY_SINGLE
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* - \ref VPOST_DISPLAY_CONTINUOUS
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* @return none
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*/
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void vpostSetDisplayMode(uint8_t u8DisplayMode)
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{
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if (u8DisplayMode == 0)
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outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~(1 << 7)); //clear setting
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else
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outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | (u8DisplayMode) << 7);
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}
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/**
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* @brief Configure display attributes of video interface,
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* @param[in] u32VASrcType is display type, value could be
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* - \ref VA_SRC_YUV422
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* - \ref VA_SRC_YCBCR422
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* - \ref VA_SRC_RGB888
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* - \ref VA_SRC_RGB666
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* - \ref VA_SRC_RGB565
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* - \ref VA_SRC_RGB444_LOW
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* - \ref VA_SRC_RGB444_HIGH
|
|
* @return none
|
|
*/
|
|
void vpostSetVASrc(uint32_t u32VASrcType)
|
|
{
|
|
uint32_t u32BytePerPixel, VA_FF, VA_Sride;
|
|
|
|
curVADev.ucVASrcFormat = u32VASrcType;
|
|
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~(7 << 8));
|
|
if (u32VASrcType != 0)
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | u32VASrcType);
|
|
else
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~(7 << 8));
|
|
|
|
if ((u32VASrcType == VA_SRC_RGB888) || (u32VASrcType == VA_SRC_RGB666))
|
|
outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~0x7ff07ff | (curDisplayDev.u32DevWidth << 16) | curDisplayDev.u32DevWidth);
|
|
else
|
|
outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~0x7ff07ff | ((curDisplayDev.u32DevWidth / 2) << 16) | (curDisplayDev.u32DevWidth / 2));
|
|
|
|
switch (u32VASrcType)
|
|
{
|
|
case VA_SRC_YUV422:
|
|
case VA_SRC_YCBCR422:
|
|
case VA_SRC_RGB565:
|
|
u32BytePerPixel = 2;
|
|
break;
|
|
|
|
case VA_SRC_RGB666:
|
|
case VA_SRC_RGB888:
|
|
u32BytePerPixel = 4;
|
|
break;
|
|
|
|
default:
|
|
u32BytePerPixel = 2;
|
|
}
|
|
|
|
/* set video stream frame buffer control */
|
|
VA_FF = curDisplayDev.u32DevWidth * u32BytePerPixel / 4;
|
|
VA_Sride = curDisplayDev.u32DevWidth * u32BytePerPixel / 4;
|
|
outpw(REG_LCM_VA_FBCTRL, inpw(REG_LCM_VA_FBCTRL) & ~0x7ff07ff | (VA_FF << 16) | VA_Sride);
|
|
}
|
|
|
|
/**
|
|
* @brief Start to display
|
|
* @param none
|
|
* @return none
|
|
*/
|
|
void vpostVAStartTrigger(void)
|
|
{
|
|
if ((inpw(REG_LCM_DCCS) & VPOSTB_SINGLE) == VPOSTB_SINGLE)
|
|
while ((inpw(REG_LCM_DCCS) & VPOSTB_VA_EN) == VPOSTB_VA_EN); //wait VA_EN low
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | VPOSTB_DISP_OUT_EN); //display_out-enable
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | VPOSTB_VA_EN); //va-enable
|
|
}
|
|
|
|
/**
|
|
* @brief Stop to display
|
|
* @param none
|
|
* @return none
|
|
*/
|
|
void vpostVAStopTrigger(void)
|
|
{
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~(VPOSTB_DISP_OUT_EN | VPOSTB_VA_EN)); //OSD disable
|
|
}
|
|
|
|
/**
|
|
* @brief Configure LCD scaling attribute
|
|
* @param[in] u8HIntegral is horizontal integral
|
|
* @param[in] u16HDecimal is horizontal decimal
|
|
* @param[in] u8VIntegral is vertical integral
|
|
* @param[in] u16VDecimal is vertical decimal
|
|
* @param[in] u32Mode is scale mode, value could be
|
|
* - \ref VA_SCALE_INTERPOLATION
|
|
* - \ref VA_SCALE_DUPLICATION
|
|
* @return none
|
|
*/
|
|
void vpostVAScalingCtrl(uint8_t u8HIntegral, uint16_t u16HDecimal, uint8_t u8VIntegral, uint16_t u16VDecimal, uint32_t u32Mode)
|
|
{
|
|
outpw(REG_LCM_VA_SCALE, ((((uint32_t)u8VIntegral << 10) + ((uint32_t)ceil((double)1024 / 10)*u16VDecimal)) << 16)
|
|
| (((uint32_t)u8HIntegral << 10) + ((uint32_t)ceil((double)1024 / 10)*u16HDecimal)) | u32Mode);
|
|
}
|
|
|
|
/**
|
|
* @brief Set OSD color key
|
|
* @param[in] u8CKeyColorR is color key R color
|
|
* @param[in] u8CKeyColorG is color key G color
|
|
* @param[in] u8CKeyColorB is color key B color
|
|
* @return none
|
|
*/
|
|
void vpostOSDSetColKey(uint8_t u8CKeyColorR, uint8_t u8CKeyColorG, uint8_t u8CKeyColorB)
|
|
{
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) & ~(VPOSTB_BLI_ON | VPOSTB_CKEY_ON)); //blinking disable, color-key disable
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | VPOSTB_CKEY_ON);//color-key enable
|
|
outpw(REG_LCM_OSD_CKEY, ((uint32_t)(u8CKeyColorR << 16) | (uint32_t)(u8CKeyColorG << 8) | u8CKeyColorB));
|
|
}
|
|
|
|
/**
|
|
* @brief Set OSD color mask, OSD data only will be displayed if the mask bit is set as 1.
|
|
* @param[in] u8MaskColorR is color key R color
|
|
* @param[in] u8MaskColorG is color key G color
|
|
* @param[in] u8MaskColorB is color key B color
|
|
* @return none
|
|
*/
|
|
void vpostOSDSetColMask(uint8_t u8MaskColorR, uint8_t u8MaskColorG, uint8_t u8MaskColorB)
|
|
{
|
|
outpw(REG_LCM_OSD_CMASK, ((u8MaskColorR << 16) | (u8MaskColorG << 8) | u8MaskColorB));
|
|
}
|
|
|
|
/**
|
|
* @brief Set OSD blinking function
|
|
* @param[in] u8OSDBlinkVcnt is blinking cycle time, unit is VSync
|
|
* @return none
|
|
*/
|
|
void vpostOSDSetBlinking(uint8_t u8OSDBlinkVcnt)
|
|
{
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) & ~(VPOSTB_BLI_ON | VPOSTB_CKEY_ON)); //blinking disable, color-key disable
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | VPOSTB_BLI_ON);
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | ((uint32_t)(u8OSDBlinkVcnt) << 16));
|
|
}
|
|
|
|
/**
|
|
* @brief Disable OSD blinking function
|
|
* @param none
|
|
* @return none
|
|
*/
|
|
void vpostOSDDisableBlinking(void)
|
|
{
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) & ~ VPOSTB_BLI_ON);
|
|
}
|
|
|
|
/**
|
|
* @brief Configure display attributes of OSD
|
|
* @param[in] u32OSDSrcType is display type, value could be
|
|
* - \ref OSD_SRC_YUV422
|
|
* - \ref OSD_SRC_YCBCR422
|
|
* - \ref OSD_SRC_RGB888
|
|
* - \ref OSD_SRC_RGB666
|
|
* - \ref OSD_SRC_RGB565
|
|
* - \ref OSD_SRC_RGB444_LOW
|
|
* - \ref OSD_SRC_RGB444_HIGH
|
|
* - \ref OSD_SRC_RGB332
|
|
* @return none
|
|
*/
|
|
void vpostSetOSDSrc(uint32_t u32OSDSrcType)
|
|
{
|
|
uint32_t u32BytePerPixel, VA_FF, VA_Sride;
|
|
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~(7 << 12) | u32OSDSrcType);
|
|
curOSDDev.ucOSDSrcFormat = u32OSDSrcType;
|
|
|
|
switch (u32OSDSrcType)
|
|
{
|
|
case OSD_SRC_YUV422:
|
|
case OSD_SRC_YCBCR422:
|
|
case OSD_SRC_RGB565:
|
|
u32BytePerPixel = 2;
|
|
break;
|
|
|
|
case OSD_SRC_RGB666:
|
|
case OSD_SRC_RGB888:
|
|
u32BytePerPixel = 4;
|
|
break;
|
|
|
|
default:
|
|
u32BytePerPixel = 2;
|
|
}
|
|
|
|
/* set video stream frame buffer control */
|
|
VA_FF = curOSDDev.nOSDWidth * u32BytePerPixel / 4;
|
|
VA_Sride = curOSDDev.nOSDWidth * u32BytePerPixel / 4;
|
|
outpw(REG_LCM_OSD_FBCTRL, inpw(REG_LCM_OSD_FBCTRL) & ~0x7ff07ff | (VA_FF << 16) | VA_Sride);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the pointer of OSD frame buffer
|
|
* @param none
|
|
* @return pointer of OSD frame buffer
|
|
* @retval NULL fail.
|
|
* @note Must call \ref vpostOSDSetWindow and \ref vpostSetOSDSrc before calling this function
|
|
*/
|
|
uint8_t *vpostGetOSDBuffer(void)
|
|
{
|
|
uint32_t u32BytePerPixel;
|
|
uint8_t *u8BufPtr;
|
|
|
|
if ((curOSDDev.nOSDWidth == 0) || (curOSDDev.nOSDHeight == 0))
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
switch (curOSDDev.ucOSDSrcFormat)
|
|
{
|
|
case OSD_SRC_YUV422:
|
|
case OSD_SRC_YCBCR422:
|
|
case OSD_SRC_RGB565:
|
|
u32BytePerPixel = 2;
|
|
break;
|
|
|
|
case OSD_SRC_RGB666:
|
|
case OSD_SRC_RGB888:
|
|
u32BytePerPixel = 4;
|
|
break;
|
|
|
|
default:
|
|
u32BytePerPixel = 2;
|
|
}
|
|
|
|
u8BufPtr = (uint8_t *)malloc((curOSDDev.nOSDWidth * curOSDDev.nOSDHeight * u32BytePerPixel) + 32);
|
|
if (u8BufPtr == NULL)
|
|
return NULL;
|
|
u8BufPtr = (uint8_t *)shift_pointer((uint32_t)u8BufPtr, 32);
|
|
|
|
outpw(REG_LCM_OSD_BADDR, (uint32_t)((uint32_t)u8BufPtr | 0x80000000));
|
|
|
|
return (uint8_t *)((uint32_t)u8BufPtr | 0x80000000);
|
|
}
|
|
|
|
/**
|
|
* @brief Get the pointer of OSD buffer
|
|
* @param[in] u32Cnt is the frame buffer count to allocate. Min value is 1.
|
|
* @return pointer of frame buffer
|
|
* @retval NULL fail.
|
|
* @note before calling this function, display width, height and source format must be set first.
|
|
*/
|
|
uint8_t *vpostGetMultiOSDBuffer(uint32_t u32Cnt)
|
|
{
|
|
uint32_t u32BytePerPixel;
|
|
uint8_t *u8BufPtr;
|
|
|
|
if ((curOSDDev.nOSDWidth == 0) || (curOSDDev.nOSDHeight == 0))
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
switch (curOSDDev.ucOSDSrcFormat)
|
|
{
|
|
case OSD_SRC_YUV422:
|
|
case OSD_SRC_YCBCR422:
|
|
case OSD_SRC_RGB565:
|
|
u32BytePerPixel = 2;
|
|
break;
|
|
|
|
case OSD_SRC_RGB666:
|
|
case OSD_SRC_RGB888:
|
|
u32BytePerPixel = 4;
|
|
break;
|
|
|
|
default:
|
|
u32BytePerPixel = 2;
|
|
}
|
|
|
|
u8BufPtr = (uint8_t *)malloc((curOSDDev.nOSDWidth * curOSDDev.nOSDHeight * u32BytePerPixel) * u32Cnt + 32);
|
|
if (u8BufPtr == NULL)
|
|
return NULL;
|
|
u8BufPtr = (uint8_t *)shift_pointer((uint32_t)u8BufPtr, 32);
|
|
|
|
outpw(REG_LCM_OSD_BADDR, (uint32_t)((uint32_t)u8BufPtr | 0x80000000));
|
|
|
|
return (uint8_t *)((uint32_t)u8BufPtr | 0x80000000);
|
|
|
|
}
|
|
|
|
void vpostSetOSDBuffer(uint8_t *u8BufPtr)
|
|
{
|
|
outpw(REG_LCM_OSD_BADDR, (uint32_t)((uint32_t)u8BufPtr | 0x80000000));
|
|
}
|
|
|
|
/**
|
|
* @brief Enable OSD function
|
|
* @param none
|
|
* @return none
|
|
*/
|
|
void vpostOSDEnable(void)
|
|
{
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | VPOSTB_OSD_EN); //OSD enable
|
|
}
|
|
|
|
/**
|
|
* @brief Disable OSD function
|
|
* @param none
|
|
* @return none
|
|
*/
|
|
void vpostOSDDisable(void)
|
|
{
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & ~VPOSTB_OSD_EN); //OSD disable
|
|
}
|
|
|
|
/**
|
|
* @brief Configure OSD scaling attribute
|
|
* @param[in] u8HIntegral is horizontal integral
|
|
* @param[in] u16HDecimal is horizontal decimal
|
|
* @param[in] u8VScall is scale mode, value could be
|
|
* - \ref VPOSTB_OSD_VUP_1X
|
|
* - \ref VPOSTB_OSD_VUP_2X
|
|
* - \ref VPOSTB_OSD_VUP_4X
|
|
* @return none
|
|
*/
|
|
void vpostOSDScalingCtrl(uint8_t u8HIntegral, uint16_t u16HDecimal, uint8_t u8VScall)
|
|
{
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) & 0xfff0ffff); //clear OSD scaling setting
|
|
if (u8VScall != 0)
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | (u8VScall << 16));
|
|
outpw(REG_LCM_OSD_SCALE, ((uint32_t)u8HIntegral << 10) | ((uint32_t)ceil((double)1024 / 10 * u16HDecimal)) << 6);
|
|
}
|
|
|
|
/**
|
|
* @brief Set OSD display window, including start position, width and height.
|
|
* @param[in] u32XStart is X start position
|
|
* @param[in] u32YStart is Y start position
|
|
* @param[in] u32Width is OSD display width
|
|
* @param[in] u32Height is OSD display height
|
|
* @return none
|
|
*/
|
|
void vpostOSDSetWindow(uint32_t u32XStart, uint32_t u32YStart, uint32_t u32Width, uint32_t u32Height)
|
|
{
|
|
outpw(REG_LCM_OSD_WINS, ((u32YStart + 1) << 16) | (u32XStart + 1));
|
|
outpw(REG_LCM_OSD_WINE, ((u32YStart + u32Height) << 16) | (u32XStart + u32Width));
|
|
|
|
curOSDDev.nOSDWidth = u32Width;
|
|
curOSDDev.nOSDHeight = u32Height;
|
|
}
|
|
|
|
/**
|
|
* @brief Initialize hardware cursor function
|
|
* @param[in] u32CursorBMPBuff is pointer of hardware cursor image
|
|
* @param[in] ucMode is hardware cursor mode, value could be
|
|
* - \ref HC_MODE0
|
|
* - \ref HC_MODE1
|
|
* - \ref HC_MODE2
|
|
* - \ref HC_MODE3
|
|
* - \ref HC_MODE4
|
|
* - \ref HC_MODE5
|
|
* @return none
|
|
*/
|
|
void vpostHCInit(uint32_t *u32CursorBMPBuff, VA_HCMODE_E ucMode)
|
|
{
|
|
int bpp = 2;
|
|
int BlockWidth = 32;
|
|
int bpw = 32;
|
|
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x003f3f00 | (0x00 << 8) | (0x00 << 16)); //set TIP
|
|
if (ucMode == HC_MODE0)
|
|
{
|
|
bpp = 2;
|
|
BlockWidth = 32;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7); //set mode 0 32X32X2bpp 4 color
|
|
|
|
}
|
|
else if (ucMode == HC_MODE1)
|
|
{
|
|
bpp = 2;
|
|
BlockWidth = 32;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7 | 0x1); //set mode 1 32X32X2bpp 3 color and 1 transparent
|
|
}
|
|
else if (ucMode == HC_MODE2)
|
|
{
|
|
bpp = 2;
|
|
BlockWidth = 64;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7 | 0x2); //set mode 2 64X64X2bpp 4 color
|
|
}
|
|
else if (ucMode == HC_MODE3)
|
|
{
|
|
bpp = 2;
|
|
BlockWidth = 64;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7 | 0x3); //set mode 3 64X64X2bpp 3 color and 1 transparent
|
|
}
|
|
else if (ucMode == HC_MODE4)
|
|
{
|
|
bpp = 1;
|
|
BlockWidth = 128;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7 | 0x4); //set mode 4 128X128X1bpp 2 color
|
|
}
|
|
else if (ucMode == HC_MODE5)
|
|
{
|
|
bpp = 1;
|
|
BlockWidth = 128;
|
|
outpw(REG_LCM_HC_CTRL, inpw(REG_LCM_HC_CTRL) & ~0x7 | 0x5); //set mode 5 128X128X1bpp 1 color and 1 transparent
|
|
}
|
|
|
|
outpw(REG_LCM_HC_WBCTRL, ((bpp * BlockWidth / bpw) << 16) | (bpp * BlockWidth / bpw));
|
|
outpw(REG_LCM_HC_BADDR, (uint32_t)u32CursorBMPBuff);
|
|
outpw(REG_LCM_HC_COLOR0, 0x00ff0000); // RED color
|
|
outpw(REG_LCM_HC_COLOR1, 0x0000ff00); // GREEN color
|
|
outpw(REG_LCM_HC_COLOR2, 0x000000ff); // BLUE color
|
|
outpw(REG_LCM_HC_COLOR3, 0x00ffff00); // YELLOW color
|
|
outpw(REG_LCM_DCCS, inpw(REG_LCM_DCCS) | VPOSTB_HC_EN);
|
|
}
|
|
|
|
/**
|
|
* @brief Set the position of hardware cursor
|
|
* @param[in] u32CursorX is X position
|
|
* @param[in] u32CursorY is Y position
|
|
* @return none
|
|
*/
|
|
void vpostHCPosCtrl(uint32_t u32CursorX, uint32_t u32CursorY)
|
|
{
|
|
outpw(REG_LCM_HC_POS, (u32CursorY << 16) | u32CursorX); //set Cursor position
|
|
}
|
|
|
|
/**
|
|
* @brief Set OSD overlay condition
|
|
* @param[in] u8OSDDisplayMatch is display method when mask bit is matched, value could be
|
|
* - \ref DISPLAY_VIDEO
|
|
* - \ref DISPLAY_OSD
|
|
* - \ref DISPLAY_SYNTHESIZED
|
|
* @param[in] u8OSDDisplayUnMatch is display method when mask bit is unmatched
|
|
* - \ref DISPLAY_VIDEO
|
|
* - \ref DISPLAY_OSD
|
|
* - \ref DISPLAY_SYNTHESIZED
|
|
* @param[in] u8OSDSynW is synthesis video weighting, based on match condition
|
|
* @return none
|
|
*/
|
|
void vpostOSDSetOverlay(uint8_t u8OSDDisplayMatch, uint8_t u8OSDDisplayUnMatch, uint8_t u8OSDSynW)
|
|
{
|
|
/* clear OCR0 and OCR1 */
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) & 0xfffffff0);
|
|
|
|
/* match condition */
|
|
if (u8OSDDisplayMatch != 0)
|
|
{
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | (u8OSDDisplayMatch << 2));
|
|
}
|
|
|
|
/* unmatch condition */
|
|
if (u8OSDDisplayUnMatch != 0)
|
|
{
|
|
outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | (u8OSDDisplayUnMatch));
|
|
}
|
|
|
|
/* synthesized weight */
|
|
if (u8OSDDisplayMatch == DISPLAY_SYNTHESIZED || u8OSDDisplayUnMatch == DISPLAY_SYNTHESIZED)
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{
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outpw(REG_LCM_OSD_OVERLAY, inpw(REG_LCM_OSD_OVERLAY) | (u8OSDSynW << 4));
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}
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}
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/**
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* @brief Write MPU command
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* @param[in] uscmd MPU command code
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* @return none
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*/
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void vpostMPUWriteAddr(uint16_t uscmd)
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{
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) & ~(1 << 30)); //RS=0
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) & ~(1 << 29)); //w
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) | (1 << 5))); //CMD ON
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outpw(REG_LCM_MPU_CMD, (inpw(REG_LCM_MPU_CMD) & 0xffff0000 | uscmd));
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while (inpw(REG_LCM_MPU_CMD) & (1UL << 31));
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) & ~(1 << 5))); //CMD OFF
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}
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/**
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* @brief Write MPU data
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* @param[in] usdata MPU data
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* @return none
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*/
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void vpostMPUWriteData(uint16_t usdata)
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{
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) | (1 << 30)); //RS=1
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) & ~(1 << 29)); //w
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) | (1 << 5))); //CMD ON
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) & 0xffff0000 | usdata);
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while (inpw(REG_LCM_MPU_CMD) & (1UL << 31));
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) & ~(1 << 5))); //CMD OFF
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}
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/**
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* @brief Read MPU data
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* @param none
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* @return MPU data
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*/
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uint32_t vpostMPUReadData(void)
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{
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uint32_t udata;
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) | (1 << 30)); //RS=1
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) | (1 << 5))); //CMD ON
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outpw(REG_LCM_MPU_CMD, inpw(REG_LCM_MPU_CMD) | (1 << 29)); //r
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while (inpw(REG_LCM_MPU_CMD) & (1UL << 31));
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udata = inpw(REG_LCM_MPU_CMD) & 0xffff;
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) & ~(1 << 5))); //CMD OFF
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return udata;
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}
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/*@}*/ /* end of group N9H30_LCD_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group N9H30_LCD_Driver */
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/*@}*/ /* end of group N9H30_Device_Driver */
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/*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/
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