79 lines
2.0 KiB
C
79 lines
2.0 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2017-5-30 Bernard the first version
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* 2021-07-31 GuEe-GUI add ARM GIC definitions
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* 2021-09-11 GuEe-GUI rename right macros for gic
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*/
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#ifndef BOARD_H__
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#define BOARD_H__
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#include <rthw.h>
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#include <rtdef.h>
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#include <stdint.h>
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extern unsigned char __bss_start;
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extern unsigned char __bss_end;
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#define RT_HW_HEAP_BEGIN (void*)&__bss_end
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#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN + 1 * 1024 * 1024)
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#define __REG32(x) (*((volatile unsigned int *)(x)))
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#define VIRTIO_SPI_IRQ_BASE 32
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/* Virtio BLK */
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#define VIRTIO_MMIO_BLK0_BASE 0x0a000000
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#define VIRTIO_MMIO_BLK0_SIZE 0x00000200
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#define VIRTIO_MMIO_BLK0_IRQ (VIRTIO_SPI_IRQ_BASE + 0x10)
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/* UART */
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#define PL011_UARTDR 0x000
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#define PL011_UARTFR 0x018
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#define PL011_UARTFR_TXFF_BIT 5
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#define PL011_UART0_BASE 0x09000000
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#define PL011_UART0_SIZE 0x00001000
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#define PL011_UART0_IRQNUM (VIRTIO_SPI_IRQ_BASE + 1)
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/* RTC */
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#define PL031_RTC_BASE 0x9010000
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#define PL031_RTC_SIZE 0x00001000
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#define PL031_RTC_IRQNUM (VIRTIO_SPI_IRQ_BASE + 2)
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/* DIST and CPU */
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#define GIC_PL390_DISTRIBUTOR_PPTR 0x08000000
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#define GIC_PL390_CONTROLLER_PPTR 0x08010000
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#define MAX_HANDLERS 96
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#define GIC_IRQ_START 0
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/* number of interrupts on board */
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#define ARM_GIC_NR_IRQS 96
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/* only one GIC available */
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#define ARM_GIC_MAX_NR 1
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/* ipi interrupt number */
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#define IRQ_ARM_IPI_KICK 0
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#define IRQ_ARM_IPI_CALL 1
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#define IRQ_ARM_VTIMER 27
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/* the basic constants and interfaces needed by gic */
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rt_inline rt_uint32_t platform_get_gic_dist_base(void)
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{
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return GIC_PL390_DISTRIBUTOR_PPTR;
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}
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rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
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{
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return GIC_PL390_CONTROLLER_PPTR;
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}
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void rt_hw_board_init(void);
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#endif
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