62 lines
1.2 KiB
ArmAsm
62 lines
1.2 KiB
ArmAsm
/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-03-28 Shell Move vector handling codes from context_gcc.S
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*/
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#ifndef __ASSEMBLY__
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#define __ASSEMBLY__
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#endif
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#include "../include/vector_gcc.h"
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#include "context_gcc.h"
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#include <rtconfig.h>
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#include <asm-generic.h>
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#include <asm-fpu.h>
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#include <armv8.h>
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.section .text
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vector_fiq:
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.align 8
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.globl vector_fiq
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SAVE_IRQ_CONTEXT
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bl rt_hw_trap_fiq
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b rt_hw_irq_exit
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.globl rt_thread_switch_interrupt_flag
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.globl rt_hw_context_switch_interrupt_do
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/**
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* void rt_hw_vector_irq_sched(void *eframe)
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* @brief do IRQ scheduling
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*/
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rt_hw_vector_irq_sched:
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.globl rt_hw_vector_irq_sched
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.align 8
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/**
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* if rt_thread_switch_interrupt_flag set, jump to
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* rt_hw_context_switch_interrupt_do and don't return
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*/
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ldr x1, =rt_thread_switch_interrupt_flag
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ldr x2, [x1]
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cmp x2, #1
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bne 1f
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/* clear flag */
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mov x2, #0
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str x2, [x1]
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bl rt_hw_context_switch_interrupt_do
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1:
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b rt_hw_irq_exit
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