385 lines
17 KiB
C
385 lines
17 KiB
C
/**************************************************************************//**
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* @file pdma.h
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* @version V1.00
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* @brief M480 series PDMA driver header file
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*
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* @copyright (C) 2014~2016 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __PDMA_H__
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#define __PDMA_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup PDMA_Driver PDMA Driver
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@{
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*/
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/** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
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@{
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*/
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#define PDMA_CH_MAX 16UL /*!< Specify Maximum Channels of PDMA \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Operation Mode Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */
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#define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */
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#define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Data Width Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */
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#define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */
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#define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Address Attribute Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */
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#define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */
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#define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */
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#define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Burst Mode Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */
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#define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */
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#define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */
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#define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */
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#define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */
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#define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */
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#define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */
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#define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */
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#define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */
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#define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Table Interrupt Disable Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_TBINTDIS_ENABLE (0x0UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Enabled \hideinitializer */
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#define PDMA_TBINTDIS_DISABLE (0x1UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Disabled \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Peripheral Transfer Mode Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_MEM 0UL /*!<DMA Connect to Memory \hideinitializer */
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#define PDMA_USB_TX 2UL /*!<DMA Connect to USB_TX \hideinitializer */
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#define PDMA_USB_RX 3UL /*!<DMA Connect to USB_RX \hideinitializer */
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#define PDMA_UART0_TX 4UL /*!<DMA Connect to UART0_TX \hideinitializer */
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#define PDMA_UART0_RX 5UL /*!<DMA Connect to UART0_RX \hideinitializer */
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#define PDMA_UART1_TX 6UL /*!<DMA Connect to UART1_TX \hideinitializer */
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#define PDMA_UART1_RX 7UL /*!<DMA Connect to UART1_RX \hideinitializer */
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#define PDMA_UART2_TX 8UL /*!<DMA Connect to UART2_TX \hideinitializer */
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#define PDMA_UART2_RX 9UL /*!<DMA Connect to UART2_RX \hideinitializer */
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#define PDMA_UART3_TX 10UL /*!<DMA Connect to UART3_TX \hideinitializer */
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#define PDMA_UART3_RX 11UL /*!<DMA Connect to UART3_RX \hideinitializer */
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#define PDMA_UART4_TX 12UL /*!<DMA Connect to UART4_TX \hideinitializer */
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#define PDMA_UART4_RX 13UL /*!<DMA Connect to UART4_RX \hideinitializer */
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#define PDMA_UART5_TX 14UL /*!<DMA Connect to UART5_TX \hideinitializer */
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#define PDMA_UART5_RX 15UL /*!<DMA Connect to UART5_RX \hideinitializer */
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#define PDMA_USCI0_TX 16UL /*!<DMA Connect to USCI0_TX \hideinitializer */
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#define PDMA_USCI0_RX 17UL /*!<DMA Connect to USCI0_RX \hideinitializer */
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#define PDMA_USCI1_TX 18UL /*!<DMA Connect to USCI1_TX \hideinitializer */
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#define PDMA_USCI1_RX 19UL /*!<DMA Connect to USCI1_RX \hideinitializer */
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#define PDMA_QSPI0_TX 20UL /*!<DMA Connect to QSPI0_TX \hideinitializer */
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#define PDMA_QSPI0_RX 21UL /*!<DMA Connect to QSPI0_RX \hideinitializer */
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#define PDMA_SPI0_TX 22UL /*!<DMA Connect to SPI0_TX \hideinitializer */
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#define PDMA_SPI0_RX 23UL /*!<DMA Connect to SPI0_RX \hideinitializer */
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#define PDMA_SPI1_TX 24UL /*!<DMA Connect to SPI1_TX \hideinitializer */
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#define PDMA_SPI1_RX 25UL /*!<DMA Connect to SPI1_RX \hideinitializer */
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#define PDMA_SPI2_TX 26UL /*!<DMA Connect to SPI2_TX \hideinitializer */
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#define PDMA_SPI2_RX 27UL /*!<DMA Connect to SPI2_RX \hideinitializer */
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#define PDMA_SPI3_TX 28UL /*!<DMA Connect to SPI3_TX \hideinitializer */
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#define PDMA_SPI3_RX 29UL /*!<DMA Connect to SPI3_RX \hideinitializer */
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#define PDMA_EPWM0_P1_RX 32UL /*!<DMA Connect to EPWM0_P1 \hideinitializer */
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#define PDMA_EPWM0_P2_RX 33UL /*!<DMA Connect to EPWM0_P2 \hideinitializer */
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#define PDMA_EPWM0_P3_RX 34UL /*!<DMA Connect to EPWM0_P3 \hideinitializer */
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#define PDMA_EPWM1_P1_RX 35UL /*!<DMA Connect to EPWM1_P1 \hideinitializer */
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#define PDMA_EPWM1_P2_RX 36UL /*!<DMA Connect to EPWM1_P2 \hideinitializer */
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#define PDMA_EPWM1_P3_RX 37UL /*!<DMA Connect to PWM1_P3 \hideinitializer */
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#define PDMA_I2C0_TX 38UL /*!<DMA Connect to I2C0_TX \hideinitializer */
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#define PDMA_I2C0_RX 39UL /*!<DMA Connect to I2C0_RX \hideinitializer */
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#define PDMA_I2C1_TX 40UL /*!<DMA Connect to I2C1_TX \hideinitializer */
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#define PDMA_I2C1_RX 41UL /*!<DMA Connect to I2C1_RX \hideinitializer */
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#define PDMA_I2C2_TX 42UL /*!<DMA Connect to I2C2_TX \hideinitializer */
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#define PDMA_I2C2_RX 43UL /*!<DMA Connect to I2C2_RX \hideinitializer */
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#define PDMA_I2S0_TX 44UL /*!<DMA Connect to I2S0_TX \hideinitializer */
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#define PDMA_I2S0_RX 45UL /*!<DMA Connect to I2S0_RX \hideinitializer */
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#define PDMA_TMR0 46UL /*!<DMA Connect to TMR0 \hideinitializer */
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#define PDMA_TMR1 47UL /*!<DMA Connect to TMR1 \hideinitializer */
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#define PDMA_TMR2 48UL /*!<DMA Connect to TMR2 \hideinitializer */
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#define PDMA_TMR3 49UL /*!<DMA Connect to TMR3 \hideinitializer */
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#define PDMA_ADC_RX 50UL /*!<DMA Connect to ADC_RX \hideinitializer */
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#define PDMA_DAC0_TX 51UL /*!<DMA Connect to DAC0_TX \hideinitializer */
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#define PDMA_DAC1_TX 52UL /*!<DMA Connect to DAC1_TX \hideinitializer */
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#define EPWM0_CH0_TX 53UL /*!<DMA Connect to EPWM0_CH0_TX \hideinitializer */
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#define EPWM0_CH1_TX 54UL /*!<DMA Connect to EPWM0_CH1_TX \hideinitializer */
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#define EPWM0_CH2_TX 55UL /*!<DMA Connect to EPWM0_CH2_TX \hideinitializer */
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#define EPWM0_CH3_TX 56UL /*!<DMA Connect to EPWM0_CH3_TX \hideinitializer */
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#define EPWM0_CH4_TX 57UL /*!<DMA Connect to EPWM0_CH4_TX \hideinitializer */
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#define EPWM0_CH5_TX 58UL /*!<DMA Connect to EPWM0_CH5_TX \hideinitializer */
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#define EPWM1_CH0_TX 59UL /*!<DMA Connect to EPWM1_CH0_TX \hideinitializer */
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#define EPWM1_CH1_TX 60UL /*!<DMA Connect to EPWM1_CH1_TX \hideinitializer */
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#define EPWM1_CH2_TX 61UL /*!<DMA Connect to EPWM1_CH2_TX \hideinitializer */
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#define EPWM1_CH3_TX 62UL /*!<DMA Connect to EPWM1_CH3_TX \hideinitializer */
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#define EPWM1_CH4_TX 63UL /*!<DMA Connect to EPWM1_CH4_TX \hideinitializer */
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#define EPWM1_CH5_TX 64UL /*!<DMA Connect to EPWM1_CH5_TX \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Interrupt Type Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_INT_TRANS_DONE 0x00000000UL /*!<Transfer Done Interrupt \hideinitializer */
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#define PDMA_INT_TEMPTY 0x00000001UL /*!<Table Empty Interrupt \hideinitializer */
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#define PDMA_INT_TIMEOUT 0x00000002UL /*!<Timeout Interrupt \hideinitializer */
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/*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */
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/** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
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@{
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*/
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/**
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* @brief Get PDMA Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @return None
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*
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* @details This macro gets the interrupt status.
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* \hideinitializer
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*/
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#define PDMA_GET_INT_STATUS(pdma) ((uint32_t)(pdma->INTSTS))
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/**
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* @brief Get Transfer Done Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @return None
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*
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* @details Get the transfer done Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_GET_TD_STS(pdma) ((uint32_t)(pdma->TDSTS))
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/**
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* @brief Clear Transfer Done Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @param[in] u32Mask The channel mask
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*
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* @return None
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*
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* @details Clear the transfer done Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_CLR_TD_FLAG(pdma,u32Mask) ((uint32_t)(pdma->TDSTS = (u32Mask)))
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/**
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* @brief Get Target Abort Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @return None
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*
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* @details Get the target abort Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_GET_ABORT_STS(pdma) ((uint32_t)(pdma->ABTSTS))
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/**
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* @brief Clear Target Abort Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @param[in] u32Mask The channel mask
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*
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* @return None
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*
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* @details Clear the target abort Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_CLR_ABORT_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ABTSTS = (u32Mask)))
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/**
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* @brief Get Alignment Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @return None
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*
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* @details Get Alignment Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_GET_ALIGN_STS(pdma) ((uint32_t)(PDMA->ALIGN))
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/**
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* @brief Clear Alignment Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Mask The channel mask
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*
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* @return None
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*
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* @details Clear the Alignment Interrupt status.
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* \hideinitializer
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*/
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#define PDMA_CLR_ALIGN_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ALIGN = (u32Mask)))
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/**
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* @brief Clear Timeout Interrupt Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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*
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* @return None
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*
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* @details Clear the selected channel timeout interrupt status.
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* \hideinitializer
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*/
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#define PDMA_CLR_TMOUT_FLAG(pdma,u32Ch) ((uint32_t)(pdma->INTSTS = (1 << ((u32Ch) + 8))))
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/**
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* @brief Check Channel Status
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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*
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* @retval 0 Idle state
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* @retval 1 Busy state
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*
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* @details Check the selected channel is busy or not.
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* \hideinitializer
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*/
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#define PDMA_IS_CH_BUSY(pdma,u32Ch) ((uint32_t)(pdma->TRGSTS & (1 << (u32Ch)))? 1 : 0)
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/**
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* @brief Set Source Address
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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* @param[in] u32Addr The selected address
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*
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* @return None
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*
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* @details This macro set the selected channel source address.
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* \hideinitializer
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*/
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#define PDMA_SET_SRC_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].SA = (u32Addr)))
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/**
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* @brief Set Destination Address
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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* @param[in] u32Addr The selected address
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*
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* @return None
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*
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* @details This macro set the selected channel destination address.
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* \hideinitializer
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*/
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#define PDMA_SET_DST_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].DA = (u32Addr)))
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/**
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* @brief Set Transfer Count
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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* @param[in] u32TransCount Transfer Count
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*
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* @return None
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*
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* @details This macro set the selected channel transfer count.
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* \hideinitializer
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*/
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#define PDMA_SET_TRANS_CNT(pdma,u32Ch, u32TransCount) ((uint32_t)(pdma->DSCT[(u32Ch)].CTL=(pdma->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|(((u32TransCount)-1) << PDMA_DSCT_CTL_TXCNT_Pos)))
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/**
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* @brief Set Scatter-gather descriptor Address
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*
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* @param[in] pdma The pointer of the specified PDMA module
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* @param[in] u32Ch The selected channel
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* @param[in] u32Addr The descriptor address
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*
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* @return None
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*
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* @details This macro set the selected channel scatter-gather descriptor address.
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* \hideinitializer
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*/
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#define PDMA_SET_SCATTER_DESC(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].NEXT = (u32Addr) - (pdma->SCATBA)))
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/**
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* @brief Stop the channel
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @param[in] u32Ch The selected channel
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*
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* @return None
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*
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* @details This macro stop the selected channel.
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* \hideinitializer
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*/
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#define PDMA_STOP(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch))))
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/**
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* @brief Pause the channel
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*
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* @param[in] pdma The pointer of the specified PDMA module
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*
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* @param[in] u32Ch The selected channel
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*
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* @return None
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*
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* @details This macro pause the selected channel.
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* \hideinitializer
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*/
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#define PDMA_PAUSE(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch))))
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/*---------------------------------------------------------------------------------------------------------*/
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/* Define PDMA functions prototype */
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/*---------------------------------------------------------------------------------------------------------*/
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void PDMA_Open(PDMA_T * pdma,uint32_t u32Mask);
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void PDMA_Close(PDMA_T * pdma);
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void PDMA_SetTransferCnt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
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void PDMA_SetTransferAddr(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
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void PDMA_SetTransferMode(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
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void PDMA_SetBurstType(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
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void PDMA_EnableTimeout(PDMA_T * pdma,uint32_t u32Mask);
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void PDMA_DisableTimeout(PDMA_T * pdma,uint32_t u32Mask);
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void PDMA_SetTimeOut(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt);
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void PDMA_Trigger(PDMA_T * pdma,uint32_t u32Ch);
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void PDMA_EnableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask);
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void PDMA_DisableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask);
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void PDMA_SetStride(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount);
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/*@}*/ /* end of group PDMA_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group PDMA_Driver */
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/*@}*/ /* end of group Standard_Driver */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PDMA_H__ */
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/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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