351 lines
8.2 KiB
C
351 lines
8.2 KiB
C
/*
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* uffs/flash/k9f2g08.c
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*
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* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Info:
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* Low hardware driver for samsung nandflash.
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*/
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/* XXX UFFS XXX */
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#include <uffs/uffs_types.h>
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#include <nand.h>
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#include "s3c24x0.h"
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#include <k9f2g08.h>
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#define nand_write_cmd(cmd) (NFCMD = (cmd))
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#define nand_write_addr(addr) (NFADDR = (addr))
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#define nand_cs_en() (NFCONT &= ~(1<<1))
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#define nand_cs_ds() (NFCONT |= (1<<1))
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#define nand_Init_ECC() (NFCONT |= (1<<4))
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#define nand_read() (NFDATA8)
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#define nand_write(data) (NFDATA8 = (data))
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#define nand_wait() {while(!(NFSTAT&(1<<0)));} //wait tWB and check F_RNB pin.
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/*
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*************************************************
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** H/W dependent functions **
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*************************************************
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*/
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/* HCLK=100Mhz */
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#define TACLS 1 /* 1clk(0ns) */
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#define TWRPH0 4 /* 3clk(25ns) */
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#define TWRPH1 0 /* 1clk(10ns) */ /* TACLS+TWRPH0+TWRPH1>=50ns */
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int read_nand_stats(void) /* R/B is fixed? */
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{
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u8 stat;
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nand_write_cmd(NAND_CMD_STATUS);
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stat = nand_read();/* read byte */
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if(stat&1) return 1; /* I/O0=1 successful */
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else return 0; /* I/O0=0 unsuccessful */
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}
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/*
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*erase a block
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*return 0,successful
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*return 1,error
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*/
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int K9F2G08_EraseBlock(u32 block)
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{
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int stat;
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u32 _page = block*PAGES_PER_BLOCK;
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nand_cs_en();
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nand_write_cmd(NAND_CMD_ERASE1); /* Erase one block 1st command */
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nand_write_addr(_page&0xff); /* Page number=0 */
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nand_write_addr((_page>>8)&0xff);
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nand_write_addr((_page>>16)&0xff);
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nand_write_cmd(NAND_CMD_ERASE2); /* Erase one blcok 2nd command */
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nand_wait(); /* Wait tBERS max 3ms. */
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stat = read_nand_stats();
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nand_cs_ds();
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return stat;
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}
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/*
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* check block is bad?
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* return 1 if it's a bad block, 0 if it's good.
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*/
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int K9F2G08_Check_badblk(u32 block)
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{
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u8 data;
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u32 _page;/* frist page in block */
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_page = block*PAGES_PER_BLOCK; /* For 2'nd cycle I/O[7:5] */
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nand_cs_en();
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nand_write_cmd(NAND_CMD_READ0); /* Spare array read command */
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nand_write_addr(PAGE_DATA_SIZE&0xff); /* Read the mark of bad block in spare array(M addr=5) */
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nand_write_addr((PAGE_DATA_SIZE>>8)&0xff);
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nand_write_addr(_page&0xff); /* The mark of bad block is in 0 page */
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nand_write_addr((_page>>8)&0xff); /* For block number A[24:17] */
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nand_write_addr((_page>>16)&0xff); /* For block number A[25] */
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nand_write_cmd(NAND_CMD_READSTART);
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nand_wait(); /* Wait tR(max 12us) */
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data=nand_read();
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nand_cs_ds();
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if(data==0x00)
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return 1;/* bad */
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else
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return 0;/* good */
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}
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/*
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* mark a block is bad
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* return 0 if ok, 1:fail
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*/
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int K9F2G08_Mark_badblk(u32 block)
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{
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u8 stat;
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u32 _page = block*PAGES_PER_BLOCK;
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nand_cs_en();
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nand_write_cmd(NAND_CMD_SEQIN); /* Write 1st command */
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nand_write_addr(PAGE_DATA_SIZE & 0xff);/* The mark of bad block */
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nand_write_addr((PAGE_DATA_SIZE>>8)&0xff);
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nand_write_addr(_page&0xff); /* marked 1th spare array */
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nand_write_addr((_page>>8)&0xff); /* in the 1st page. */
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nand_write_addr((_page>>16)&0xff);
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nand_write(0x00); /* 0x00 is commendatory make of the bad block. */
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nand_write_cmd(NAND_CMD_PAGEPROG); /* Write 2nd command */
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nand_wait(); /* Wait tPROG(200~500us) */
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stat = read_nand_stats();
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nand_cs_ds();
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return stat;
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}
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int K9F2G08_ReadPage(u32 block, u32 page, u8 *buffer, int len, u8 *ecc)
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{
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int i;
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u32 _page = block*PAGES_PER_BLOCK + page;
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/* NF_RSTECC(); */ /* Initialize ECC*/
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nand_cs_en();
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nand_write_cmd(NAND_CMD_READ0); /* Read command */
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nand_write_addr(0x00); /* Column = 0 */
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nand_write_addr(0x00);
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nand_write_addr(_page&0xff);
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nand_write_addr((_page>>8)&0xff);
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nand_write_addr((_page>>16)&0xff);
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nand_write_cmd(NAND_CMD_READSTART);
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nand_wait(); /* Wait tR(max 12us) */
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for(i=0;i<len;i++)
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{
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buffer[i] = nand_read(); /* Read one page */
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}
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nand_cs_ds();
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return 1;
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}
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int K9F2G08_ReadTags(u32 block, u32 page, u8 *spare, int ofs, int len)
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{
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int i;
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u32 _page = block*PAGES_PER_BLOCK + page;
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/* NF_RSTECC(); */ /* Initialize ECC */
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nand_cs_en();
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nand_write_cmd(NAND_CMD_READ0);
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nand_write_addr((PAGE_DATA_SIZE+ofs)&0xff);
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nand_write_addr(((PAGE_DATA_SIZE+ofs)>>8)&0xff);
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nand_write_addr(_page&0xff);
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nand_write_addr((_page>>8)&0xff);
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nand_write_addr((_page>>16)&0xff);
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nand_write_cmd(NAND_CMD_READSTART);
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nand_wait(); /* Wait tR(max 12us) */
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for(i=0;i<len;i++)
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{
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spare[i] = nand_read(); /* Read one page */
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}
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nand_cs_ds();
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return 1;
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}
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/*
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* write one page data
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* return 0,successful
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* return 1,error
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*/
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int K9F2G08_WritePage(u32 block, u32 page, const u8 *buffer, int len, const u8 *ecc)
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{
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int i,stat;
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u32 _page = block*PAGES_PER_BLOCK + page;
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/* nand_Init_ECC(); */ /* nitialize ECC */
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nand_cs_en();
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nand_write_cmd(NAND_CMD_SEQIN);
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for(i=0;i<10;i++);
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nand_write_addr(0x00); /* Column 0 */
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nand_write_addr(0x00);
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nand_write_addr(_page&0xff);
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nand_write_addr((_page>>8)&0xff);
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nand_write_addr((_page>>16)&0xff);
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for(i=0;i<len;i++)
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{
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nand_write(*buffer++);
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}
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nand_write_cmd(NAND_CMD_PAGEPROG);
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nand_wait(); /* wait tPROG 200~500us; */
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stat = read_nand_stats();
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nand_cs_ds();
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return stat;
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}
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int K9F2G08_WriteTags(u32 block, u32 page, const u8 *spare, int ofs, int len)
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{
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int i,stat;
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u32 _page = block*PAGES_PER_BLOCK + page;
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/* nand_Init_ECC(); */ /* Initialize ECC */
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nand_cs_en();
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nand_write_cmd(NAND_CMD_SEQIN);
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for(i=0;i<10;i++);
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nand_write_addr((PAGE_DATA_SIZE+ofs)&0xff);
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nand_write_addr(((PAGE_DATA_SIZE+ofs)>>8)&0xff);
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nand_write_addr(_page&0xff);
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nand_write_addr((_page>>8)&0xff);
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nand_write_addr((_page>>16)&0xff);
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for(i=0;i<len;i++)
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{
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nand_write(*spare++);
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}
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nand_write_cmd(NAND_CMD_PAGEPROG);
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nand_wait(); /* wait tPROG 200~500us; */
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stat = read_nand_stats();
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if(!stat) /* Page write error */
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{
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nand_cs_ds();
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return 0;
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}
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else
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{
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nand_cs_ds();
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return 1;
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}
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}
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/* when all is true,read all byte */
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void K9F2G08_ReadChipID(u8* buf, UBOOL all)
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{
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nand_cs_en();
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nand_write_cmd(NAND_CMD_READID);
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nand_write_addr(NAND_CMD_READ0);
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buf[0] = nand_read();/* manufacturer ID */
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buf[1] = nand_read();/* physical chip ID */
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if(all)
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{
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buf[2] = nand_read();
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buf[3] = nand_read();
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/* buf[4] = nand_read(); */ /* Some chips have no 5th byte */
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}
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nand_cs_ds();
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}
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void K9F2G08_Init(void)
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{
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NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4)|(0<<0);
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NFCONT = (0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0);
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NFSTAT = 0;
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/* 1 1 1 1, 1 xxx, r xxx, r xxx */
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/* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */
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}
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void K9F2G08_Reset(void)
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{
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nand_cs_en();
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nand_write_cmd(0xFF); /* reset command */
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nand_wait(); /* wait 200~500us */
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nand_cs_ds();
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K9F2G08_Init();
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}
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#if (0)
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int K9F2G08_ReadChunk(u32 chunk, u8 *data, u8 *tags)
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{
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int i;
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nand_cs_en();
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nand_write_cmd(NAND_CMD_READ0);
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nand_write_addr(0x00);
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nand_write_addr(0x00);
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nand_write_addr(chunk & 0xff);
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nand_write_addr((chunk >> 8) & 0xff);
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nand_write_addr((chunk >> 16) & 0xff); //
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/* nand_Init_ECC(); */
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nand_write_cmd(NAND_CMD_READ30);
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nand_wait(); /* Wait tR(max 12us) */
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for(i = 0; i < PAGE_DATA_SIZE; i++)
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{
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data[i] = nand_read(); /* Read page data */
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}
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for(i = 0; i < PAGE_SPARE_SIZE; i++)
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{
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tags[i] = nand_read(); /* Read spare array */
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}
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nand_cs_ds();
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return 1;
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}
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#endif
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