72 lines
2.8 KiB
C
72 lines
2.8 KiB
C
/*
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* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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*
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* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
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* the the People's Republic of China and other countries.
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* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
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*
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* DISCLAIMER
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* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
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* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
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* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
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* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
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* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
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* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
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* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __COMMON_LRADC_I_H__
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#define __COMMON_LRADC_I_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* lradc register offset */
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#define LRADC_CTRL_REG (0x00) /* LRADC Control Register */
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#define LRADC_INTC_REG (0x04) /* LRADC Interrupt Control Register */
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#define LRADC_INTS_REG (0x08) /* LRADC Interrupt Status Register */
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#define LRADC_DATA0_REG (0x0c) /* LRADC Data Register */
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#define LRADC_REV_REG (0x0100) /* LRADC Revsion Register */
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/* ctrl register */
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#define FIRST_CONCERT_DLY (0<<24)
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#define CHAN (0x0)
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#define ADC_CHAN_SELECT (CHAN<<22)
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#define LRADC_KEY_MODE (0)
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#define KEY_MODE_SELECT (LRADC_KEY_MODE<<12)
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#define LRADC_HOLD_EN (1<<6)
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#define LEVELB_VOL ~(3<<4)
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#define LRADC_SAMPLE_2KHZ ~(3<<2)
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#define LRADC_EN (1<<0)
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/* intc register */
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#define LRADC_ADC0_UP_EN (1<<4)
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#define LRADC_ADC0_DOWN_EN (1<<1)
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#define LRADC_ADC0_DATA_EN (1<<0)
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/* irq status*/
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#define LRADC_ADC0_UPPEND (1<<4)
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#define LRADC_ADC0_DOWNPEND (1<<1)
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#define LRADC_ADC0_DATAPEND (1<<0)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __COMMON_LRADC_I_H__ */
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