783 lines
16 KiB
C
783 lines
16 KiB
C
/*
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* g2d_rcq/g2d_driver/g2d.c
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*
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* Copyright (c) 2007-2019 Allwinnertech Co., Ltd.
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* Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
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*
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <hal_mem.h>
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#include <hal_cache.h>
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#include <stdlib.h>
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#include <string.h>
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#include <interrupt.h>
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#include <init.h>
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#include <hal_clk.h>
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#include <hal_reset.h>
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#include <hal_timer.h>
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// #include <melis/standby/standby.h>
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#include "g2d_driver_i.h"
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#include "g2d_top.h"
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#include "g2d_mixer.h"
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#include "g2d_rotate.h"
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#define SUNXI_GIC_START 32
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#if defined(CONFIG_ARCH_SUN8IW19)
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#define SUNXI_IRQ_G2D (SUNXI_GIC_START + 21)
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#define SUNXI_G2D_START 0x01480000
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#define SUNXI_G2D_RESET_ID 0
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#define SUNXI_G2D_CLK_ID HAL_CLK_PERIPH_G2D
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#define SUNXI_G2D_CLK_BUS_ID (hal_clk_id_t)(-1)
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#define SUNXI_G2D_CLK_MBUS_ID (hal_clk_id_t)(-1)
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#define SUNXI_G2D_CLK_PARENT HAL_CLK_PLL_PERI1
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#elif defined(CONFIG_SOC_SUN20IW1)
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#define SUNXI_IRQ_G2D 105
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#define SUNXI_G2D_START 0x05410000
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#define RESET_IOMMU
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#define G2D_IOMMU_MASTER_ID 3
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#define IOMMU_RESET_REG 0x02010010
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#define IOMMU_BGR_REG 0x020017bc
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#endif
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#ifndef SUNXI_G2D_CLK_ID
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#define SUNXI_G2D_CLK_ID CLK_G2D
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#endif
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#ifndef SUNXI_G2D_RESET_ID
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#define SUNXI_G2D_RESET_ID RST_BUS_G2D
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#endif
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#ifndef SUNXI_G2D_CLK_BUS_ID
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#define SUNXI_G2D_CLK_BUS_ID CLK_BUS_G2D
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#endif
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#ifndef SUNXI_G2D_CLK_MBUS_ID
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#define SUNXI_G2D_CLK_MBUS_ID CLK_MBUS_G2D
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#endif
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#ifndef SUNXI_G2D_CLK_PARENT
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#define SUNXI_G2D_CLK_PARENT CLK_PLL_PERIPH0_2X
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#endif
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enum g2d_scan_order scan_order;
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hal_sem_t global_lock;
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u32 g_time_info;
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u32 g_func_runtime;
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__g2d_drv_t g2d_ext_hd;
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__g2d_info_t para;
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__u32 dbg_info;
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void *g2d_malloc(__u32 bytes_num, __u32 *phy_addr)
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{
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char* vir_addr;
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if (bytes_num != 0) {
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vir_addr = hal_malloc_align(bytes_num, CACHELINE_LEN);
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if(vir_addr!=NULL){
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*phy_addr = __va_to_pa((unsigned long)vir_addr);
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memset((void *)vir_addr, 0, bytes_num);
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hal_dcache_clean((unsigned long)vir_addr, bytes_num);
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return vir_addr;
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}
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G2D_ERR_MSG("hal_malloc fail!\n");
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return NULL;
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}
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G2D_ERR_MSG("size is zero\n");
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return NULL;
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}
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void g2d_free(void *virt_addr, void *phy_addr, unsigned int size)
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{
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if (virt_addr == NULL)
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return;
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hal_free_align(virt_addr);
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}
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int g2d_mutex_lock(hal_sem_t sem)
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{
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return hal_sem_wait(sem);
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}
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int g2d_mutex_unlock(hal_sem_t sem)
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{
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return hal_sem_post(sem);
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}
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__s32 g2d_byte_cal(__u32 format, __u32 *ycnt, __u32 *ucnt, __u32 *vcnt)
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{
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*ycnt = 0;
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*ucnt = 0;
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*vcnt = 0;
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if (format <= G2D_FORMAT_BGRX8888)
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*ycnt = 4;
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else if (format <= G2D_FORMAT_BGR888)
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*ycnt = 3;
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else if (format <= G2D_FORMAT_BGRA5551)
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*ycnt = 2;
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else if (format <= G2D_FORMAT_BGRA1010102)
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*ycnt = 4;
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else if (format <= 0x23) {
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*ycnt = 2;
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}
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else if (format <= 0x25) {
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*ycnt = 1;
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*ucnt = 2;
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}
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else if (format == 0x26) {
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*ycnt = 1;
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*ucnt = 1;
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*vcnt = 1;
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}
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else if (format <= 0x29) {
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*ycnt = 1;
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*ucnt = 2;
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}
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else if (format == 0x2a) {
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*ycnt = 1;
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*ucnt = 1;
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*vcnt = 1;
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}
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else if (format <= 0x2d) {
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*ycnt = 1;
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*ucnt = 2;
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}
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else if (format == 0x2e) {
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*ycnt = 1;
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*ucnt = 1;
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*vcnt = 1;
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}
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else if (format == 0x30)
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*ycnt = 1;
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else if (format <= 0x36) {
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*ycnt = 2;
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*ucnt = 4;
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}
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else if (format <= 0x39)
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*ycnt = 6;
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return 0;
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}
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/**
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*/
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__u32 cal_align(__u32 width, __u32 align)
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{
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switch (align) {
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case 0:
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return width;
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case 4:
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return (width + 3) >> 2 << 2;
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case 8:
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return (width + 7) >> 3 << 3;
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case 16:
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return (width + 15) >> 4 << 4;
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case 32:
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return (width + 31) >> 5 << 5;
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case 64:
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return (width + 63) >> 6 << 6;
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case 128:
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return (width + 127) >> 7 << 7;
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default:
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return (width + 31) >> 5 << 5;
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}
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}
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__s32 g2d_image_check(g2d_image_enh *p_image)
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{
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__s32 ret = -EINVAL;
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if (!p_image) {
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G2D_ERR_MSG("NUll pointer!\n");
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goto OUT;
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}
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if (((p_image->clip_rect.x < 0) &&
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((-p_image->clip_rect.x) > p_image->clip_rect.w)) ||
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((p_image->clip_rect.y < 0) &&
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((-p_image->clip_rect.y) > p_image->clip_rect.h)) ||
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((p_image->clip_rect.x > 0) &&
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(p_image->clip_rect.x > p_image->width - 1)) ||
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((p_image->clip_rect.y > 0) &&
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(p_image->clip_rect.y > p_image->height - 1))) {
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G2D_ERR_MSG("Invalid imager parameter setting\n");
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goto OUT;
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}
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if (((p_image->clip_rect.x < 0) &&
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((-p_image->clip_rect.x) <
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p_image->clip_rect.w))) {
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p_image->clip_rect.w =
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p_image->clip_rect.w +
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p_image->clip_rect.x;
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p_image->clip_rect.x = 0;
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} else if ((p_image->clip_rect.x +
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p_image->clip_rect.w)
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> p_image->width) {
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p_image->clip_rect.w =
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p_image->width -
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p_image->clip_rect.x;
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}
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if (((p_image->clip_rect.y < 0) &&
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((-p_image->clip_rect.y) <
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p_image->clip_rect.h))) {
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p_image->clip_rect.h =
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p_image->clip_rect.h +
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p_image->clip_rect.y;
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p_image->clip_rect.y = 0;
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} else if ((p_image->clip_rect.y +
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p_image->clip_rect.h)
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> p_image->height) {
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p_image->clip_rect.h =
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p_image->height -
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p_image->clip_rect.y;
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}
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p_image->bpremul = 0;
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p_image->bbuff = 1;
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p_image->gamut = G2D_BT709;
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ret = 0;
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OUT:
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return ret;
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}
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int g2d_blit_h(g2d_blt_h *para)
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{
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int ret = -1;
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ret = g2d_rotate_set_para(¶->src_image_h,
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¶->dst_image_h,
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para->flag_h);
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return ret;
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}
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#ifdef RESET_IOMMU
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/**
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* g2d could cause iommu stop, when iommu stop, g2d could not work, we should reset iommu.
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*/
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static void reset_iommu(void)
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{
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int tmp;
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int ret;
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uint32_t regval;
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*(volatile uint32_t *)(IOMMU_BGR_REG) = 0x1;
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regval = (*(volatile uint32_t *)(IOMMU_RESET_REG));
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*(volatile uint32_t *)(IOMMU_RESET_REG) = regval & (~(1 << G2D_IOMMU_MASTER_ID));
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regval = (*(volatile uint32_t *)(IOMMU_RESET_REG));
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if (!(regval & ((1 << G2D_IOMMU_MASTER_ID)))) {
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*(volatile uint32_t *)(IOMMU_RESET_REG) = regval | ((1 << G2D_IOMMU_MASTER_ID));
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}
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regval = (*(volatile uint32_t *)(IOMMU_RESET_REG));
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*(volatile uint32_t *)(IOMMU_BGR_REG) = 0;
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return;
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}
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#else
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static void reset_iommu(void)
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{
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}
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#endif
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int g2d_wait_cmd_finish(unsigned int timeout)
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{
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int ret;
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ret = hal_sem_timedwait(g2d_ext_hd.queue_sem,timeout* 10);
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if (ret < 0) {
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reset_iommu();
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g2d_bsp_reset();
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G2D_ERR_MSG("G2D irq pending flag timeout\n");
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g2d_ext_hd.finish_flag = 1;
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//wake_up(&g2d_ext_hd.queue);
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return -1;
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}
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g2d_ext_hd.finish_flag = 0;
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return 0;
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}
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irqreturn_t g2d_handle_irq(int irq, void *dev_id)
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{
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#if G2D_MIXER_RCQ_USED == 1
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if (g2d_top_rcq_task_irq_query()) {
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// g2d_top_mixer_reset();
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g2d_ext_hd.finish_flag = 1;
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hal_sem_post(g2d_ext_hd.queue_sem);
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return IRQ_HANDLED;
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}
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#else
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if (g2d_mixer_irq_query()) {
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// g2d_top_mixer_reset();
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g2d_ext_hd.finish_flag = 1;
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hal_sem_post(g2d_ext_hd.queue_sem);
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return IRQ_HANDLED;
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}
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#endif
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if (g2d_rot_irq_query()) {
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// g2d_top_rot_reset();
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g2d_ext_hd.finish_flag = 1;
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hal_sem_post(g2d_ext_hd.queue_sem);
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return IRQ_HANDLED;
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}
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return IRQ_HANDLED;
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}
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int g2d_clk_init(__g2d_info_t *info)
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{
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int i;
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int ret;
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hal_reset_id_t rst_id;
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hal_reset_type_t reset_type = HAL_SUNXI_RESET;
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hal_clk_type_t clk_type = HAL_SUNXI_CCU;
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hal_clk_id_t clk_id[G2D_CLK_NUM] = {
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SUNXI_G2D_CLK_ID,/*note SUNXI_G2D_CLK_ID must be here, please see g2d_clock_enable*/
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SUNXI_G2D_CLK_BUS_ID,
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SUNXI_G2D_CLK_MBUS_ID,
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};
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info->clk_rate = 300000000; /*300Mhz*/
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info->reset = hal_reset_control_get(reset_type, SUNXI_G2D_RESET_ID);
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hal_reset_control_deassert(info->reset);
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info->clk_parent= hal_clock_get(clk_type,SUNXI_G2D_CLK_PARENT);
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for(i = 0; i < G2D_CLK_NUM; i++) {
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if (clk_id[i] != (hal_clk_id_t)-1) {
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info->clk[i] = hal_clock_get(clk_type, clk_id[i]);
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}
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}
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ret = hal_clk_set_parent(info->clk[0], info->clk_parent);
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if (ret)
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G2D_ERR_MSG("set clk:%d's parent:%d fail!\n", info->clk, info->clk_parent);
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return ret;
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}
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int g2d_clk_exit(__g2d_info_t *info)
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{
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int i = 0;
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for(i = 0; i < G2D_CLK_NUM; i++) {
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hal_clock_put(info->clk[i]);
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}
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hal_reset_control_put(info->reset);
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return 0;
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}
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int g2d_clock_enable(__g2d_info_t *info)
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{
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int ret = -1;
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int i = 0;
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ret = hal_reset_control_deassert(info->reset);
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if (ret) {
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G2D_ERR_MSG("deassert rst fail:%d\n", ret);
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goto OUT;
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}
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ret = hal_clock_enable(info->clk_parent);
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if (ret) {
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G2D_ERR_MSG("Enable clk parent fail:%d\n", ret);
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goto OUT;
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}
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ret = hal_clk_set_rate(info->clk[0], info->clk_rate);
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if (ret) {
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G2D_ERR_MSG("Set clk rate fail:%d:%u!\n", info->clk[0], (unsigned int)info->clk_rate);
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goto OUT;
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}
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for(i = 0; i < G2D_CLK_NUM; i++) {
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ret = hal_clock_enable(info->clk[i]);
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if (ret) {
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G2D_ERR_MSG("Enable clk %d fail:%d\n", i, ret);
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goto OUT;
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}
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}
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OUT:
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return ret;
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}
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static int g2d_clock_disable(__g2d_info_t *info)
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{
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int ret = -1;
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int i;
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for(i = 0; i < G2D_CLK_NUM; i++) {
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ret = hal_clock_disable(info->clk[i]);
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if (ret) {
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G2D_ERR_MSG("Disable clk %d fail:%d\n", i, ret);
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goto OUT;
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}
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}
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ret = hal_reset_control_assert(info->reset);
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if (ret) {
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G2D_ERR_MSG("assert rst fail:%d\n", ret);
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goto OUT;
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}
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OUT:
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return ret;
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}
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__s32 drv_g2d_init(__g2d_info_t *info)
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{
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int ret;
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memset(&g2d_ext_hd, 0, sizeof(__g2d_drv_t));
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g2d_ext_hd.queue_sem = hal_sem_create(0);
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if (g2d_ext_hd.queue_sem == NULL)
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{
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G2D_ERR_MSG("create g2d_ext_hd.queue_sem failed\n");
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return -1;
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}
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g2d_top_set_base((__u32)info->io);
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g2d_rot_set_base((__u32)info->io);
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g2d_mixer_idr_init();
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return 0;
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}
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#ifdef CONFIG_STANDBY
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/**
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* @desc This function suspend the g2d
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* @param null
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*/
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int g2d_suspend(void)
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{
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g2d_mutex_lock(para.mutex);
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if (para.opened) {
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g2d_clock_disable(¶);
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g2d_bsp_close();
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}
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g2d_mutex_unlock(para.mutex);
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return 0;
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}
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/**
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* @desc This function resume the g2d
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* @param null
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*/
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int g2d_resume(void)
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{
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g2d_mutex_lock(para.mutex);
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if (para.opened) {
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g2d_clock_enable(¶);
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g2d_bsp_open();
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}
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g2d_mutex_unlock(para.mutex);
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return 0;
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}
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static void g2d_register_pm_dev_notify(void)
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{
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register_pm_dev_notify(g2d_suspend, g2d_resume, NULL);
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}
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#else
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static void g2d_register_pm_dev_notify(void)
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{
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}
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#endif
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int g2d_probe(void)
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{
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int ret = 0;
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__g2d_info_t *info = NULL;
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info = ¶
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memset(info, 0, sizeof(__g2d_info_t));
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info->io = SUNXI_G2D_START;
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|
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if (request_irq(SUNXI_IRQ_G2D, g2d_handle_irq, 0, "g2d", NULL))
|
|
{
|
|
G2D_ERR_MSG("g2d request irq error\n");
|
|
return -1;
|
|
}
|
|
enable_irq(SUNXI_IRQ_G2D);
|
|
|
|
g2d_clk_init(info);
|
|
drv_g2d_init(info);
|
|
info->mutex = hal_sem_create(1);
|
|
global_lock = hal_sem_create(1);
|
|
if ((info->mutex == NULL) || (global_lock == NULL)) {
|
|
G2D_ERR_MSG("sysfs_create_file fail!\n");
|
|
ret = -1;
|
|
}
|
|
|
|
g2d_register_pm_dev_notify();
|
|
|
|
G2D_INFO_MSG("g2d probe finished\n");
|
|
return ret;
|
|
}
|
|
|
|
static int g2d_remove(void)
|
|
{
|
|
__g2d_info_t *info = ¶
|
|
|
|
g2d_clk_exit(info);
|
|
g2d_mixer_idr_remove();
|
|
INFO("Driver unloaded succesfully.\n");
|
|
return 0;
|
|
}
|
|
|
|
void g2d_ioctl_mutex_lock(void)
|
|
{
|
|
|
|
g2d_mutex_lock(para.mutex);
|
|
|
|
}
|
|
|
|
|
|
void g2d_ioctl_mutex_unlock(void)
|
|
{
|
|
g2d_mutex_unlock(para.mutex);
|
|
}
|
|
|
|
int sunxi_g2d_open(void)
|
|
{
|
|
g2d_mutex_lock(para.mutex);
|
|
g2d_clock_enable(¶);
|
|
para.user_cnt++;
|
|
if (para.user_cnt == 1) {
|
|
para.opened = true;
|
|
g2d_bsp_open();
|
|
}
|
|
g2d_mutex_unlock(para.mutex);
|
|
return 0;
|
|
|
|
}
|
|
|
|
int sunxi_g2d_close(void)
|
|
{
|
|
g2d_mutex_lock(para.mutex);
|
|
para.user_cnt--;
|
|
if (para.user_cnt == 0) {
|
|
para.opened = false;
|
|
g2d_bsp_close();
|
|
}
|
|
g2d_clock_disable(¶);
|
|
g2d_mutex_unlock(para.mutex);
|
|
|
|
g2d_mutex_lock(global_lock);
|
|
scan_order = G2D_SM_TDLR;
|
|
g2d_mutex_unlock(global_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
int sunxi_g2d_control(int cmd, void *arg)
|
|
{
|
|
int ret = -1;
|
|
|
|
g2d_ioctl_mutex_lock();
|
|
|
|
g2d_ext_hd.finish_flag = 0;
|
|
switch (cmd) {
|
|
case G2D_CMD_MIXER_TASK:
|
|
{
|
|
|
|
unsigned long *karg;
|
|
karg = arg;
|
|
ret = mixer_task_process(¶, (struct mixer_para *)karg[0], karg[1]);
|
|
break;
|
|
}
|
|
case G2D_CMD_CREATE_TASK:
|
|
{
|
|
|
|
unsigned long *karg;
|
|
karg = arg;
|
|
ret = create_mixer_task(¶, (struct mixer_para *)karg[0], karg[1]);
|
|
break;
|
|
}
|
|
case G2D_CMD_TASK_APPLY:
|
|
{
|
|
|
|
|
|
unsigned long *karg;
|
|
karg = arg;
|
|
|
|
|
|
struct g2d_mixer_task *p_task = NULL;
|
|
p_task = g2d_mixer_get_inst((int)karg[0]);
|
|
ret = p_task->apply(p_task, (struct mixer_para *)karg[1]);
|
|
|
|
|
|
|
|
break;
|
|
}
|
|
case G2D_CMD_TASK_DESTROY:
|
|
{
|
|
|
|
struct g2d_mixer_task *p_task = NULL;
|
|
p_task = g2d_mixer_get_inst((int)(unsigned long)arg);
|
|
ret = p_task->destory(p_task);
|
|
break;
|
|
}
|
|
case G2D_CMD_TASK_GET_PARA:
|
|
{
|
|
|
|
unsigned long *karg;
|
|
karg = arg;
|
|
struct g2d_mixer_task *p_task = NULL;
|
|
|
|
p_task = g2d_mixer_get_inst((int)karg[0]);
|
|
if(!p_task) {
|
|
ret = -EFAULT;
|
|
goto err_noput;
|
|
}
|
|
|
|
karg[1] = (unsigned long)(p_task->p_para);
|
|
ret = 0;
|
|
break;
|
|
}
|
|
case G2D_CMD_BITBLT_H:
|
|
{
|
|
g2d_blt_h blit_para;
|
|
|
|
|
|
memcpy(&blit_para, arg, sizeof(g2d_blt_h));
|
|
if (blit_para.flag_h & 0xff00) {
|
|
ret = g2d_blit_h(&blit_para);
|
|
}
|
|
|
|
else {
|
|
struct mixer_para mixer_blit_para;
|
|
memset(&mixer_blit_para, 0, sizeof(struct mixer_para));
|
|
memcpy(&mixer_blit_para.dst_image_h,
|
|
&blit_para.dst_image_h, sizeof(g2d_image_enh));
|
|
memcpy(&mixer_blit_para.src_image_h,
|
|
&blit_para.src_image_h, sizeof(g2d_image_enh));
|
|
mixer_blit_para.flag_h = blit_para.flag_h;
|
|
mixer_blit_para.op_flag = OP_BITBLT;
|
|
ret = mixer_task_process(¶, &mixer_blit_para, 1);
|
|
|
|
}
|
|
|
|
|
|
break;
|
|
}
|
|
|
|
case G2D_CMD_LBC_ROT:
|
|
{
|
|
g2d_lbc_rot lbc_para;
|
|
memcpy(&lbc_para, (g2d_lbc_rot *)arg, sizeof(g2d_lbc_rot));
|
|
ret = g2d_lbc_rot_set_para(&lbc_para);
|
|
break;
|
|
}
|
|
|
|
case G2D_CMD_BLD_H:{
|
|
|
|
g2d_bld bld_para;
|
|
struct mixer_para mixer_bld_para;
|
|
|
|
|
|
|
|
memcpy(&bld_para, (g2d_bld *) arg, sizeof(g2d_bld));
|
|
memset(&mixer_bld_para, 0, sizeof(struct mixer_para));
|
|
memcpy(&mixer_bld_para.dst_image_h,
|
|
&bld_para.dst_image, sizeof(g2d_image_enh));
|
|
memcpy(&mixer_bld_para.src_image_h,
|
|
&bld_para.src_image[0], sizeof(g2d_image_enh));
|
|
/* ptn use as src */
|
|
memcpy(&mixer_bld_para.ptn_image_h,
|
|
&bld_para.src_image[1], sizeof(g2d_image_enh));
|
|
memcpy(&mixer_bld_para.ck_para, &bld_para.ck_para,
|
|
sizeof(g2d_ck));
|
|
mixer_bld_para.bld_cmd = bld_para.bld_cmd;
|
|
mixer_bld_para.op_flag = OP_BLEND;
|
|
|
|
ret = mixer_task_process(¶, &mixer_bld_para, 1);
|
|
|
|
break;
|
|
}
|
|
case G2D_CMD_FILLRECT_H:{
|
|
|
|
g2d_fillrect_h fill_para;
|
|
struct mixer_para mixer_fill_para;
|
|
|
|
|
|
memcpy(&fill_para, (g2d_fillrect_h *) arg, sizeof(g2d_fillrect_h));
|
|
memset(&mixer_fill_para, 0, sizeof(struct mixer_para));
|
|
memcpy(&mixer_fill_para.dst_image_h,
|
|
&fill_para.dst_image_h, sizeof(g2d_image_enh));
|
|
mixer_fill_para.op_flag = OP_FILLRECT;
|
|
|
|
ret = mixer_task_process(¶, &mixer_fill_para, 1);
|
|
|
|
break;
|
|
}
|
|
case G2D_CMD_MASK_H:{
|
|
|
|
g2d_maskblt mask_para;
|
|
struct mixer_para mixer_mask_para;
|
|
|
|
memcpy(&mask_para, (g2d_maskblt *) arg, sizeof(g2d_maskblt));
|
|
memset(&mixer_mask_para, 0, sizeof(struct mixer_para));
|
|
memcpy(&mixer_mask_para.ptn_image_h,
|
|
&mask_para.ptn_image_h, sizeof(g2d_image_enh));
|
|
memcpy(&mixer_mask_para.mask_image_h,
|
|
&mask_para.mask_image_h, sizeof(g2d_image_enh));
|
|
memcpy(&mixer_mask_para.dst_image_h,
|
|
&mask_para.dst_image_h, sizeof(g2d_image_enh));
|
|
memcpy(&mixer_mask_para.src_image_h,
|
|
&mask_para.src_image_h, sizeof(g2d_image_enh));
|
|
mixer_mask_para.back_flag = mask_para.back_flag;
|
|
mixer_mask_para.fore_flag = mask_para.fore_flag;
|
|
mixer_mask_para.op_flag = OP_MASK;
|
|
|
|
ret = mixer_task_process(¶, &mixer_mask_para, 1);
|
|
|
|
break;
|
|
}
|
|
case G2D_CMD_INVERTED_ORDER:
|
|
{
|
|
if ((enum g2d_scan_order)arg > G2D_SM_DTRL) {
|
|
G2D_ERR_MSG("scan mode is err.\n");
|
|
ret = -EINVAL;
|
|
goto err_noput;
|
|
}
|
|
|
|
g2d_mutex_lock(global_lock);
|
|
scan_order = (enum g2d_scan_order)arg;
|
|
g2d_mutex_unlock(global_lock);
|
|
ret = 0;
|
|
break;
|
|
}
|
|
|
|
default:
|
|
goto err_noput;
|
|
break;
|
|
}
|
|
|
|
err_noput:
|
|
g2d_ioctl_mutex_unlock();
|
|
|
|
return ret;
|
|
}
|
|
|