337 lines
9.8 KiB
C
337 lines
9.8 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "spi_flash.h"
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#include "spi_flash_w25qxx_mtd.h"
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#define FLASH_DEBUG
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#ifdef FLASH_DEBUG
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#define FLASH_TRACE printf
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#else
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#define FLASH_TRACE(...)
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#endif /* #ifdef FLASH_DEBUG */
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/* JEDEC Manufacturer’s ID */
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#define MF_ID (0xEF)
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/* JEDEC Device ID: Memory type and Capacity */
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#define MTC_W25Q80_BV (0x4014) /* W25Q80BV */
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#define MTC_W25Q16_BV_CL_CV (0x4015) /* W25Q16BV W25Q16CL W25Q16CV */
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#define MTC_W25Q16_DW (0x6015) /* W25Q16DW */
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#define MTC_W25Q32_BV (0x4016) /* W25Q32BV */
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#define MTC_W25Q32_DW (0x6016) /* W25Q32DW */
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#define MTC_W25Q64_BV_CV (0x4017) /* W25Q64BV W25Q64CV */
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#define MTC_W25Q64_DW (0x4017) /* W25Q64DW */
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#define MTC_W25Q128_BV (0x4018) /* W25Q128BV */
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#define MTC_W25Q256_FV (TBD) /* W25Q256FV */
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#define MTC_W25X80 (0x3014)
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/* command list */
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#define CMD_WRSR (0x01) /* Write Status Register */
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#define CMD_PP (0x02) /* Page Program */
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#define CMD_READ (0x03) /* Read Data */
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#define CMD_WRDI (0x04) /* Write Disable */
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#define CMD_RDSR1 (0x05) /* Read Status Register-1 */
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#define CMD_WREN (0x06) /* Write Enable */
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#define CMD_FAST_READ (0x0B) /* Fast Read */
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#define CMD_ERASE_4K (0x20) /* Sector Erase:4K */
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#define CMD_RDSR2 (0x35) /* Read Status Register-2 */
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#define CMD_ERASE_32K (0x52) /* 32KB Block Erase */
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#define CMD_JEDEC_ID (0x9F) /* Read JEDEC ID */
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#define CMD_ERASE_full (0xC7) /* Chip Erase */
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#define CMD_ERASE_64K (0xD8) /* 64KB Block Erase */
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#define CMD_MANU_ID (0x90)
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#define DUMMY (0xFF)
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#define FLASH_ERASE_CMD CMD_ERASE_4K
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#define FLASH_BLOCK_SIZE 4096
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#define FLASH_PAGE_SIZE 256
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static void w25qxx_lock(struct rt_mtd_nor_device *device)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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rt_mutex_take(&mtd->lock, RT_WAITING_FOREVER);
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}
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static void w25qxx_unlock(struct rt_mtd_nor_device *device)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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rt_mutex_release(&mtd->lock);
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}
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static rt_uint8_t w25qxx_read_status(struct rt_mtd_nor_device *device)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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return rt_spi_sendrecv8(mtd->rt_spi_device, CMD_RDSR1);
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}
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static void w25qxx_wait_busy(struct rt_mtd_nor_device *device)
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{
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while( w25qxx_read_status(device) & (0x01));
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}
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static rt_err_t w25qxx_read_id(struct rt_mtd_nor_device *device)
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{
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rt_uint8_t cmd;
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rt_uint8_t id_recv[3];
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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w25qxx_lock(device);
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cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
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rt_spi_send(mtd->rt_spi_device, &cmd, 1);
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cmd = CMD_WRDI;
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rt_spi_send(mtd->rt_spi_device, &cmd, 1);
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/* read flash id */
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cmd = CMD_JEDEC_ID;
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rt_spi_send_then_recv(mtd->rt_spi_device, &cmd, 1, id_recv, 3);
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w25qxx_unlock(device);
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return (rt_uint32_t)(id_recv[0] << 16) | (id_recv[1] << 8) | id_recv[2];
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}
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static rt_size_t w25qxx_read(struct rt_mtd_nor_device *device, rt_off_t offset, rt_uint8_t *buffer, rt_size_t length)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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rt_uint8_t send_buffer[4];
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if((offset + length) > device->block_end * FLASH_BLOCK_SIZE)
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return 0;
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w25qxx_lock(device);
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send_buffer[0] = CMD_WRDI;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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send_buffer[0] = CMD_READ;
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send_buffer[1] = (rt_uint8_t)(offset>>16);
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send_buffer[2] = (rt_uint8_t)(offset>>8);
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send_buffer[3] = (rt_uint8_t)(offset);
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rt_spi_send_then_recv(mtd->rt_spi_device,
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send_buffer, 4,
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buffer, length);
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w25qxx_unlock(device);
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return length;
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}
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static rt_size_t w25qxx_write(struct rt_mtd_nor_device *device, rt_off_t offset, const rt_uint8_t *buffer, rt_size_t length)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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rt_uint8_t send_buffer[4];
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rt_uint8_t *write_ptr ;
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rt_size_t write_size,write_total;
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if((offset + length) > device->block_end * FLASH_BLOCK_SIZE)
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return 0;
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w25qxx_lock(device);
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send_buffer[0] = CMD_WREN;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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w25qxx_wait_busy(device); // wait erase done.
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write_size = 0;
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write_total = 0;
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write_ptr = (rt_uint8_t *)buffer;
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while(write_total < length)
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{
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send_buffer[0] = CMD_WREN;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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//write first page...
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send_buffer[0] = CMD_PP;
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send_buffer[1] = (rt_uint8_t)(offset >> 16);
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send_buffer[2] = (rt_uint8_t)(offset >> 8);
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send_buffer[3] = (rt_uint8_t)(offset);
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//address % FLASH_PAGE_SIZE + length
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if(((offset & (FLASH_PAGE_SIZE - 1)) + (length - write_total)) > FLASH_PAGE_SIZE)
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{
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write_size = FLASH_PAGE_SIZE - (offset & (FLASH_PAGE_SIZE - 1));
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}
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else
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{
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write_size = (length - write_total);
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}
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rt_spi_send_then_send(mtd->rt_spi_device,
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send_buffer, 4,
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write_ptr + write_total, write_size);
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w25qxx_wait_busy(device);
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offset += write_size;
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write_total += write_size;
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}
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send_buffer[0] = CMD_WRDI;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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w25qxx_unlock(device);
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return length;
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}
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static rt_err_t w25qxx_erase_block(struct rt_mtd_nor_device *device, rt_off_t offset, rt_uint32_t length)
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{
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struct spi_flash_mtd *mtd = (struct spi_flash_mtd *)device;
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rt_uint8_t send_buffer[4];
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rt_uint32_t erase_size = 0;
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//offset must be ALIGN_DOWN to BLOCKSIZE
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if(offset != RT_ALIGN_DOWN(offset,FLASH_BLOCK_SIZE))
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return 0;
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if((offset + length) > device->block_end * FLASH_BLOCK_SIZE)
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return 0;
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/* check length must align to block size */
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if(length % device->block_size != 0)
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{
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rt_kprintf("param length = %d ,error\n",length);
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return 0;
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}
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w25qxx_lock(device);
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send_buffer[0] = CMD_WREN;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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w25qxx_wait_busy(device); // wait erase done.
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while (erase_size < length)
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{
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send_buffer[0] = CMD_ERASE_4K;
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send_buffer[1] = (rt_uint8_t) (offset >> 16);
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send_buffer[2] = (rt_uint8_t) (offset >> 8);
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send_buffer[3] = (rt_uint8_t) (offset);
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rt_spi_send(mtd->rt_spi_device, send_buffer, 4);
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w25qxx_wait_busy(device); // wait erase done.
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erase_size += 4096;
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offset += 4096;
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}
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send_buffer[0] = CMD_WRDI;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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w25qxx_unlock(device);
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return RT_EOK;
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}
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const static struct rt_mtd_nor_driver_ops w25qxx_mtd_ops =
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{
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w25qxx_read_id,
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w25qxx_read,
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w25qxx_write,
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w25qxx_erase_block,
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};
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rt_err_t w25qxx_mtd_init(const char *mtd_name,const char * spi_device_name)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t id;
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rt_uint8_t send_buffer[3];
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struct rt_spi_device* rt_spi_device;
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struct spi_flash_mtd* mtd = (struct spi_flash_mtd *)rt_malloc(sizeof(struct spi_flash_mtd));
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RT_ASSERT(mtd != RT_NULL);
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/* initialize mutex */
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if (rt_mutex_init(&mtd->lock, mtd_name, RT_IPC_FLAG_FIFO) != RT_EOK)
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{
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FLASH_TRACE("init mtd lock mutex failed\n");
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result = -RT_ENOSYS;
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goto _error_exit;
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}
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rt_spi_device = (struct rt_spi_device *)rt_device_find(spi_device_name);
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if(rt_spi_device == RT_NULL)
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{
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FLASH_TRACE("spi device %s not found!\r\n", spi_device_name);
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result = -RT_ENOSYS;
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goto _error_exit;
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}
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mtd->rt_spi_device = rt_spi_device;
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/* config spi */
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{
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struct rt_spi_configuration cfg;
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cfg.data_width = 8;
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cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB; /* SPI Compatible: Mode 0 and Mode 3 */
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cfg.max_hz = 20 * 1000 * 1000; /* 20 */
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rt_spi_configure(rt_spi_device, &cfg);
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}
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/* Init Flash device */
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{
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w25qxx_lock(&mtd->mtd_device);
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send_buffer[0] = CMD_WREN;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 1);
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w25qxx_wait_busy(&mtd->mtd_device);
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send_buffer[0] = CMD_WRSR;
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send_buffer[1] = 0;
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send_buffer[2] = 0;
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rt_spi_send(mtd->rt_spi_device, send_buffer, 3);
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w25qxx_wait_busy(&mtd->mtd_device);
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w25qxx_unlock(&mtd->mtd_device);
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}
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id = w25qxx_read_id(&mtd->mtd_device);
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mtd->mtd_device.block_size = 4096;
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mtd->mtd_device.block_start = 0;
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switch(id & 0xFFFF)
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{
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case MTC_W25Q80_BV: /* W25Q80BV */
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mtd->mtd_device.block_end = 256;
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break;
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case MTC_W25Q16_BV_CL_CV: /* W25Q16BV W25Q16CL W25Q16CV */
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case MTC_W25Q16_DW: /* W25Q16DW */
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mtd->mtd_device.block_end = 512;
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break;
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case MTC_W25Q32_BV: /* W25Q32BV */
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case MTC_W25Q32_DW: /* W25Q32DW */
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mtd->mtd_device.block_end = 1024;
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break;
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case MTC_W25Q64_BV_CV: /* W25Q64BV W25Q64CV */
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mtd->mtd_device.block_end = 2048;
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break;
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case MTC_W25Q128_BV: /* W25Q128BV */
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mtd->mtd_device.block_end = 4086;
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break;
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}
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mtd->mtd_device.ops = &w25qxx_mtd_ops;
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rt_mtd_nor_register_device(mtd_name,&mtd->mtd_device);
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return RT_EOK;
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_error_exit:
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if(mtd != RT_NULL)
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rt_free(mtd);
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return result;
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}
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