358 lines
12 KiB
C
358 lines
12 KiB
C
/*
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* @brief LPC8xx GPIO driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __GPIO_8XX_H_
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#define __GPIO_8XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup GPIO_8XX CHIP: LPC8xx GPIO driver
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* @ingroup CHIP_8XX_Drivers
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* @{
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*/
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/**
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* @brief GPIO port register block structure
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*/
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typedef struct { /*!< GPIO_PORT Structure */
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__IO uint8_t B[128][32]; /*!< Offset 0x0000: Byte pin registers ports 0 to n; pins PIOn_0 to PIOn_31 */
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__IO uint32_t W[32][32]; /*!< Offset 0x1000: Word pin registers port 0 to n */
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__IO uint32_t DIR[32]; /*!< Offset 0x2000: Direction registers port n */
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__IO uint32_t MASK[32]; /*!< Offset 0x2080: Mask register port n */
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__IO uint32_t PIN[32]; /*!< Offset 0x2100: Portpin register port n */
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__IO uint32_t MPIN[32]; /*!< Offset 0x2180: Masked port register port n */
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__IO uint32_t SET[32]; /*!< Offset 0x2200: Write: Set register for port n Read: output bits for port n */
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__O uint32_t CLR[32]; /*!< Offset 0x2280: Clear port n */
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__O uint32_t NOT[32]; /*!< Offset 0x2300: Toggle port n */
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__O uint32_t DIRSET[32]; /*!< Offset 0x2380: Set Direction */
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__O uint32_t DIRCLR[32]; /*!< Offset 0x2400: Clear Direction */
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__O uint32_t DIRNOT[32]; /*!< Offset 0x2480: Toggle Dirction */
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} LPC_GPIO_T;
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/**
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* @brief Initialize GPIO block
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
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{
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LPC_SYSCTL->SYSAHBCLKCTRL = (1 << SYSCTL_CLOCK_GPIO) | (LPC_SYSCTL->SYSAHBCLKCTRL & ~SYSCTL_SYSAHBCLKCTRL_RESERVED);
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}
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/**
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* @brief De-Initialize GPIO block
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO)
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{
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LPC_SYSCTL->SYSAHBCLKCTRL &= ~((1 << SYSCTL_CLOCK_GPIO) | SYSCTL_SYSAHBCLKCTRL_RESERVED);
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}
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/**
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* @brief Set GPIO direction for a single GPIO pin
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to set (supports port 0 only)
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* @param pin : GPIO pin to set direction on as output
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* @param isOutput: If new direction is output
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_PinSetDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool isOutput)
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{
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#ifdef CHIP_LPC82X
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if (isOutput)
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pGPIO->DIRSET[port] = 1UL << pin;
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else
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pGPIO->DIRCLR[port] = 1UL << pin;
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#else
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if (isOutput)
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pGPIO->DIR[port] |= 1UL << pin;
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else
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pGPIO->DIR[port] &= ~(1UL << pin);
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#endif
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}
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/**
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* @brief Get GPIO direction for a single GPIO pin
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to read (supports port 0 only)
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* @param pin : GPIO pin to get direction for
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* @return true if the GPIO is an output, false if input
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*/
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STATIC INLINE bool Chip_GPIO_PinGetDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
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{
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return (bool) (((pGPIO->DIR[port]) >> pin) & 1);
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}
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/**
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* @brief Toggle GPIO direction for a single GPIO pin
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to set (supports port 0 only)
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* @param pin : GPIO pin to toggle direction
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_PinToggleDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
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{
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#ifdef CHIP_LPC82X
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pGPIO->DIRNOT[port] = 1UL << pin;
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#else
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pGPIO->DIR[port] ^= 1UL << pin;
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#endif
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}
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/**
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* @brief Set a GPIO pin state via the GPIO byte register
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to set (supports port 0 only)
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* @param pin : GPIO pin to set
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* @param setting : true for high, false for low
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* @return Nothing
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* @note This function replaces Chip_GPIO_WritePortBit()
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*/
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STATIC INLINE void Chip_GPIO_PinSetState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool setting)
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{
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pGPIO->B[port][pin] = setting;
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}
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/**
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* @brief Get a GPIO pin state via the GPIO byte register
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to read (supports port 0 only)
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* @param pin : GPIO pin to get state for
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* @return true if the GPIO is high, false if low
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* @note This function replaces Chip_GPIO_ReadPortBit()
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*/
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STATIC INLINE bool Chip_GPIO_PinGetState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
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{
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return (bool) pGPIO->B[port][pin];
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}
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/**
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* @brief Get a GPIO pin state via the GPIO byte register
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : GPIO port to read (supports port 0 only)
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* @param pin : GPIO pin to get state for
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* @return true if the GPIO is high, false if low
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* @note This function replaces Chip_GPIO_ReadPortBit()
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*/
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STATIC INLINE void Chip_GPIO_PinToggleState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
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{
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pGPIO->NOT[port] = 1UL << pin;
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}
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/**
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* @brief Set GPIO direction for a all selected GPIO pins
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param pinMask : GPIO pin mask to set direction on as output (bits 0..b for pins 0..n)
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* @param isOutput: If new direction is output
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* @return Nothing
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* @note Sets multiple GPIO pins to the output direction, each bit's position that is
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* high sets the corresponding pin number for that bit to an output.
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*/
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STATIC INLINE void Chip_GPIO_PortSetDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pinMask, bool isOutput)
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{
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#ifdef CHIP_LPC82X
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if (isOutput)
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pGPIO->DIRSET[port] = pinMask;
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else
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pGPIO->DIRCLR[port] = pinMask;
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#else
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if (isOutput)
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pGPIO->DIR[port] |= pinMask;
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else
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pGPIO->DIR[port] &= ~pinMask;
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#endif
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}
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/**
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* @brief Get GPIO direction for a all GPIO pins
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @return a bitfield containing the input and output states for each pin
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* @note For pins 0..n, a high state in a bit corresponds to an output state for the
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* same pin, while a low state corresponds to an input state.
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*/
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STATIC INLINE uint32_t Chip_GPIO_PortGetDIR(LPC_GPIO_T *pGPIO, uint8_t port)
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{
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return pGPIO->DIR[port];
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}
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/**
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* @brief Toggle GPIO direction for a all selected GPIO pins
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param pinMask : GPIO pin mask Toggle direction (bits 0..n for pins 0..n)
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* @return Nothing
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* @note Toggles multiple GPIO pin's direction, each bit's position that is
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* high toggles direction of the corresponding pin number.
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*/
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STATIC INLINE void Chip_GPIO_PortToggleDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pinMask)
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{
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#ifdef CHIP_LPC82X
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pGPIO->DIRNOT[port] = pinMask;
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#else
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pGPIO->DIR[port] ^= pinMask;
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#endif
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}
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/**
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* @brief Set all GPIO raw pin states (regardless of masking)
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param value : Value to set all GPIO pin states (0..n) to
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_PortSetState(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
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{
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pGPIO->PIN[port] = value;
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}
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/**
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* @brief Get all GPIO raw pin states (regardless of masking)
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @return Current (raw) state of all GPIO pins
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*/
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STATIC INLINE uint32_t Chip_GPIO_PortGetState(LPC_GPIO_T *pGPIO, uint8_t port)
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{
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return pGPIO->PIN[port];
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}
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/**
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* @brief Toggle selected GPIO output pins to the opposite state
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param pins : pins (0..n) to toggle
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* @return None
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* @note Any bit set as a '0' will not have it's state changed. This only
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* applies to ports configured as an output.
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*/
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STATIC INLINE void Chip_GPIO_PortToggleState(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
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{
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pGPIO->NOT[port] = pins;
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}
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/**
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* @brief Set selected GPIO output pins to the high state
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param pins : pins (0..n) to set high
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* @return None
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* @note Any bit set as a '0' will not have it's state changed. This only
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* applies to ports configured as an output.
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*/
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STATIC INLINE void Chip_GPIO_PortSetOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bmPins)
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{
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pGPIO->SET[port] = bmPins;
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}
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/**
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* @brief Set selected GPIO output pins to the low state
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param pins : pins (0..n) to set low
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* @return None
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* @note Any bit set as a '0' will not have it's state changed. This only
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* applies to ports configured as an output.
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*/
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STATIC INLINE void Chip_GPIO_PortSetOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
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{
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pGPIO->CLR[port] = pins;
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}
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/**
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* @brief Set GPIO port mask value for GPIO masked read and write
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param mask : Mask value for read and write (only low bits are enabled)
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* @return Nothing
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* @note Controls which bits are set or unset when using the masked
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* GPIO read and write functions. A low state indicates the pin is settable
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* and readable via the masked write and read functions.
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*/
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STATIC INLINE void Chip_GPIO_PortSetMask(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t mask)
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{
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pGPIO->MASK[port] = mask;
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}
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/**
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* @brief Get GPIO port mask value used for GPIO masked read and write
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @return Returns value set with the Chip_GPIO_PortSetMask() function.
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* @note A high bit in the return value indicates that that GPIO pin for the
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* port cannot be set using the masked write function.
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*/
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STATIC INLINE uint32_t Chip_GPIO_PortGetMask(LPC_GPIO_T *pGPIO, uint8_t port)
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{
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return pGPIO->MASK[port];
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}
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/**
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* @brief Set all GPIO pin states, but mask via the MASKP0 register
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @param value : Value to set all GPIO pin states (0..n) to
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* @return Nothing
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*/
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STATIC INLINE void Chip_GPIO_PortSetMaskedState(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
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{
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pGPIO->MPIN[port] = value;
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}
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/**
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* @brief Get all GPIO pin statesm but mask via the MASKP0 register
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* @param pGPIO : The base of GPIO peripheral on the chip
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* @param port : port Number (supports port 0 only)
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* @return Current (masked) state of all GPIO pins
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*/
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STATIC INLINE uint32_t Chip_GPIO_PortGetMaskedState(LPC_GPIO_T *pGPIO, uint8_t port)
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{
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return pGPIO->MPIN[port];
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}
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __GPIO_8XX_H_ */
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