399 lines
34 KiB
XML
399 lines
34 KiB
XML
<?xml version="1.0" encoding= "UTF-8" ?>
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<configuration name="MIMXRT1062xxxxA" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.8 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.8.xsd" uuid="22c3ac06-9f09-4f14-9c74-93bdfd15fb8a" version="1.8" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.8" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<common>
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<processor>MIMXRT1062xxxxA</processor>
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<package>MIMXRT1062DVL6A</package>
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<board>MIMXRT1060-EVK</board>
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<mcu_data>ksdk2_0</mcu_data>
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<cores selected="core0">
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<core name="Cortex-M7F" id="core0" description="M7 core"/>
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</cores>
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<description></description>
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</common>
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<preferences>
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<validate_boot_init_only>true</validate_boot_init_only>
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<generate_extended_information>false</generate_extended_information>
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<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
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</preferences>
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<tools>
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<pins name="Pins" version="8.0" enabled="true" update_project_code="true">
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<pins_profile>
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<processor_version>0.8.11</processor_version>
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<power_domains/>
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</pins_profile>
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<functions_list>
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<function name="BOARD_InitPins">
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<description>Configures pin routing and optionally pin electrical features.</description>
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<options>
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<callFromInitBoot>true</callFromInitBoot>
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<coreID>core0</coreID>
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<enableClock>true</enableClock>
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</options>
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<dependencies>
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<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
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<feature name="initialized" evaluation="equal">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="Peripheral" resourceId="ARM" description="Peripheral ARM is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
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<feature name="initialized" evaluation="equal">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
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<feature name="enabled" evaluation="equal" configuration="core0">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
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<feature name="enabled" evaluation="equal" configuration="core0">
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<data>true</data>
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</feature>
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</dependency>
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</dependencies>
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<pins>
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<pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
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<pin_features>
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<pin_feature name="software_input_on" value="Disable"/>
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<pin_feature name="hysteresis_enable" value="Disable"/>
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<pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
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<pin_feature name="pull_keeper_select" value="Keeper"/>
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<pin_feature name="pull_keeper_enable" value="Enable"/>
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<pin_feature name="open_drain" value="Disable"/>
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<pin_feature name="speed" value="MHZ_100"/>
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<pin_feature name="drive_strength" value="R0_6"/>
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<pin_feature name="slew_rate" value="Slow"/>
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</pin_features>
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</pin>
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<pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
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<pin_features>
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<pin_feature name="software_input_on" value="Disable"/>
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<pin_feature name="hysteresis_enable" value="Disable"/>
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<pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
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<pin_feature name="pull_keeper_select" value="Keeper"/>
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<pin_feature name="pull_keeper_enable" value="Enable"/>
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<pin_feature name="open_drain" value="Disable"/>
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<pin_feature name="speed" value="MHZ_100"/>
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<pin_feature name="drive_strength" value="R0_6"/>
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<pin_feature name="slew_rate" value="Slow"/>
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</pin_features>
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</pin>
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<pin peripheral="ARM" signal="arm_trace_swo" pin_num="G13" pin_signal="GPIO_AD_B0_10">
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<pin_features>
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<pin_feature name="slew_rate" value="Fast"/>
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</pin_features>
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</pin>
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</pins>
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</function>
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</functions_list>
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</pins>
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<clocks name="Clocks" version="7.0" enabled="true" update_project_code="true">
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<clocks_profile>
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<processor_version>0.8.11</processor_version>
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</clocks_profile>
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<clock_configurations>
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<clock_configuration name="BOARD_BootClockRUN">
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<description></description>
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<options/>
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<dependencies>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="routed" evaluation="">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="direction" evaluation="">
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<data>INPUT</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="routed" evaluation="">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="direction" evaluation="">
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<data>OUTPUT</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="routed" evaluation="">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="direction" evaluation="">
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<data>INPUT</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="routed" evaluation="">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
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<feature name="direction" evaluation="">
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<data>OUTPUT</data>
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</feature>
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</dependency>
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<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
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<feature name="enabled" evaluation="equal" configuration="core0">
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<data>true</data>
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</feature>
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</dependency>
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<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
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<feature name="enabled" evaluation="equal" configuration="core0">
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<data>true</data>
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</feature>
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</dependency>
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</dependencies>
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<clock_sources>
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<clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
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</clock_sources>
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<clock_outputs>
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<clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
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<clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
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<clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
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<clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
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<clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
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<clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
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<clock_output id="ENET1_TX_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
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<clock_output id="ENET2_125M_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
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<clock_output id="ENET2_TX_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
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<clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
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<clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
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<clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="FLEXSPI2_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
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<clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
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<clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
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<clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
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<clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
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<clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
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<clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
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<clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
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<clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
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<clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
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<clock_output id="PLL7_MAIN_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
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<clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
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<clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
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<clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
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<clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
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<clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
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<clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
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</clock_outputs>
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<clock_settings>
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<setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
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<setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
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<setting id="CCM.FLEXSPI2_PODF.scale" value="2" locked="true"/>
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<setting id="CCM.FLEXSPI2_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
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<setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
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<setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
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<setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
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<setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
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<setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
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<setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
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<setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
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<setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
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<setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
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<setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
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<setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
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<setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
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<setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
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<setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
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<setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
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<setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
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<setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
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<setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
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<setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
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<setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
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<setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
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<setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
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<setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
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<setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
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<setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
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<setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
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<setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
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<setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
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<setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
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<setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
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<setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="false"/>
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<setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="false"/>
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<setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
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<setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
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<setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
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</clock_settings>
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<called_from_default_init>true</called_from_default_init>
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</clock_configuration>
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</clock_configurations>
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</clocks>
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<dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
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<dcdx_profile>
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<processor_version>0.8.11</processor_version>
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<output_format>c_array</output_format>
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</dcdx_profile>
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<dcdx_configurations>
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<dcdx_configuration name="Device_configuration">
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<description></description>
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<options/>
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<command_groups>
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<command_group name="Imported Commands" enabled="true">
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<commands>
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<command type="write_value" address="CCM_CCGR0" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR1" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR2" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR3" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR4" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR5" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_CCGR6" value="0xFFFFFFFF" value_width="4"/>
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<command type="write_value" address="CCM_ANALOG_PLL_SYS" value="0x2001" value_width="4"/>
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<command type="write_value" address="CCM_ANALOG_PFD_528" value="0x1D0000" value_width="4"/>
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<command type="write_value" address="CCM_CBCDR" value="0x10D40" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13" value="0x00" value_width="4"/>
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<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39" value="0x10" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="SEMC_MCR" value="0x10000004" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BMCR0" value="0x81" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BMCR1" value="0x81" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR0" value="0x8000001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR1" value="0x8200001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR2" value="0x8400001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR3" value="0x8600001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR4" value="0x90000021" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR5" value="0xA0000019" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR6" value="0xA8000017" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR7" value="0xA900001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR8" value="0x21" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IOCR" value="0x79A8" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR0" value="0xF31" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR1" value="0x652922" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR2" value="0x10920" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR3" value="0x50210A08" value_width="4"/>
|
|
<command type="write_value" address="SEMC_DBICR0" value="0x21" value_width="4"/>
|
|
<command type="write_value" address="SEMC_DBICR1" value="0x888888" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR1" value="0x02" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR2" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000F" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000C" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000C" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPTXDAT" value="0x33" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000A" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR3" value="0x50210A09" value_width="4"/>
|
|
</commands>
|
|
</command_group>
|
|
</command_groups>
|
|
</dcdx_configuration>
|
|
</dcdx_configurations>
|
|
</dcdx>
|
|
<periphs name="Peripherals" version="7.0" enabled="false" update_project_code="true">
|
|
<peripherals_profile>
|
|
<processor_version>N/A</processor_version>
|
|
</peripherals_profile>
|
|
<functional_groups/>
|
|
<components/>
|
|
</periphs>
|
|
<tee name="TEE" version="2.0" enabled="false" update_project_code="true">
|
|
<tee_profile>
|
|
<processor_version>N/A</processor_version>
|
|
</tee_profile>
|
|
<global_options/>
|
|
<user_memory_regions/>
|
|
</tee>
|
|
</tools>
|
|
</configuration> |