Yaochenger b9e4fcfc68
[libcpu][riscv]整合libcpu/riscv中的移植文件 提供一份公共代码于common (#6941)
整合libcpu/riscv中的移植文件 提供一份公共代码于common

在提交本pr时,除hpmicro的内核,rv32内核bsp已完成去除大部分的冗余,大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件,从而提供一份公用代码,新移植的RV32内核的BSP可以全部使用common代码。

- 在common中提供一份公用文件:interrupt_gcc.S
- 修改原有的文件,将原有的中断中上下文切换代码替换为interrupt_gcc.S
- 基于上述修改,修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等)
- 在common中提供一份公用文件:trap_common.c;提供统一中断入口函数,中断入口函数初始化,中断入口注册等函数,并完善异常时的信息输出

- 在common中提供一份公用文件:rt_hw_stack_frame.h;将栈帧结构体剥离,供用户使用

- 在上述工作完成后,在上述工作的基础上测试仓库中risc-v内核的BSP

- 完善函数中的命名,完善中断栈的获取

- 提供一份详细的基于现有common文件的移植指南

  #### 在什么测试环境下测试通过 

- 1.CH32V307V-R1-R0
- 2.CH32V208W-R0-1V4
- 3.HPM6750EVKMINI
- 4.GD32VF103V-EVAL
- 5.qemu(CORE-V-MCU )

> 与上述开发板使用同样芯片的BSP均测试通过

在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试,测试过程系统运行正常。
2023-03-01 01:32:43 -05:00

113 lines
2.7 KiB
C

/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting code.
* 2020/11/20 BalanceTWK Add FPU support
* 2023/01/04 WangShun Adapt to CH32
*/
#include <rthw.h>
#include <rtthread.h>
#include "cpuport.h"
#include "rt_hw_stack_frame.h"
#ifndef RT_USING_SMP
volatile rt_ubase_t rt_interrupt_from_thread = 0;
volatile rt_ubase_t rt_interrupt_to_thread = 0;
volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0;
#endif
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry,
void *parameter,
rt_uint8_t *stack_addr,
void *texit)
{
struct rt_hw_stack_frame *frame;
rt_uint8_t *stk;
int i;
stk = stack_addr + sizeof(rt_ubase_t);
stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_ubase_t)stk, REGBYTES);
stk -= sizeof(struct rt_hw_stack_frame);
frame = (struct rt_hw_stack_frame *)stk;
for (i = 0; i < sizeof(struct rt_hw_stack_frame) / sizeof(rt_ubase_t); i++)
{
((rt_ubase_t *)frame)[i] = 0xdeadbeef;
}
frame->ra = (rt_ubase_t)texit;
frame->a0 = (rt_ubase_t)parameter;
frame->epc = (rt_ubase_t)tentry;
/* force to machine mode(MPP=11) and set MPIE to 1 */
#ifdef ARCH_RISCV_FPU
frame->mstatus = 0x7880;
#else
frame->mstatus = 0x1880;
#endif
return stk;
}
rt_weak void rt_trigger_software_interrupt(void)
{
while (0);
}
rt_weak void rt_hw_do_after_save_above(void)
{
while (1);
}
/*
* #ifdef RT_USING_SMP
* void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
* #else
* void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
* #endif
*/
#ifndef RT_USING_SMP
rt_weak void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread)
{
if (rt_thread_switch_interrupt_flag == 0)
rt_interrupt_from_thread = from;
rt_interrupt_to_thread = to;
rt_thread_switch_interrupt_flag = 1;
rt_trigger_software_interrupt();
return ;
}
#endif /* end of RT_USING_SMP */
/** shutdown CPU */
rt_weak void rt_hw_cpu_shutdown()
{
rt_base_t level;
rt_kprintf("shutdown...\n");
level = rt_hw_interrupt_disable();
while (level)
{
RT_ASSERT(0);
}
}