533 lines
16 KiB
C
533 lines
16 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2023/7/11 liqiaozhong init SD card and mount file system
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* 2023/11/8 zhugengyu add interrupt handling for dma waiting, unify function naming
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*/
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/***************************** Include Files *********************************/
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#include"rtconfig.h"
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#ifdef BSP_USING_SDIF
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#include <rthw.h>
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#include <rtdef.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rtdbg.h>
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#include <drivers/mmcsd_core.h>
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#ifdef RT_USING_SMART
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#include "ioremap.h"
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#endif
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#include "mm_aspace.h"
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#include "interrupt.h"
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#define LOG_TAG "sdif_drv"
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#include "drv_log.h"
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#include "ftypes.h"
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#include "fparameters.h"
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#include "fcpu_info.h"
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#include "fsdif_timing.h"
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#include "fsdif.h"
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#include "fsdif_hw.h"
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#include "drv_sdif.h"
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/************************** Constant Definitions *****************************/
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#ifdef USING_SDIF0
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#define SDIF_CONTROLLER_ID FSDIF0_ID
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#elif defined (USING_SDIF1)
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#define SDIF_CONTROLLER_ID FSDIF1_ID
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#endif
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#define SDIF_MALLOC_CAP_DESC 256U
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#define SDIF_DMA_ALIGN 512U
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#define SDIF_DMA_BLK_SZ 512U
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#define SDIF_VALID_OCR 0x00FFFF80 /* supported voltage range is 1.65v-3.6v (VDD_165_195-VDD_35_36) */
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#define SDIF_MAX_BLK_TRANS 20U
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#ifndef CONFIG_SDCARD_OFFSET
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#define CONFIG_SDCARD_OFFSET 0x0U
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#endif
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/* preserve pointer to host instance */
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static struct rt_mmcsd_host *mmc_host[FSDIF_NUM] = {RT_NULL};
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/**************************** Type Definitions *******************************/
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typedef struct
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{
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FSdif *mmcsd_instance;
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FSdifIDmaDesc *rw_desc;
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rt_err_t (*transfer)(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req, FSdifCmdData *cmd_data_p);
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struct rt_event event;
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#define SDIF_EVENT_CARD_DETECTED (1 << 0)
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#define SDIF_EVENT_COMMAND_DONE (1 << 1)
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#define SDIF_EVENT_DATA_DONE (1 << 2)
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#define SDIF_EVENT_ERROR_OCCUR (1 << 3)
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#define SDIF_EVENT_SDIO_IRQ (1 << 4)
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} fsdif_info_t;
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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void fsdif_change(void);
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/*******************************Api Functions*********************************/
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static void fsdif_host_relax(void)
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{
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rt_thread_mdelay(1);
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}
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static void fsdif_card_detect_callback(FSdif *const mmcsd_instance, void *args, u32 status, u32 dmac_status)
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{
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struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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rt_event_send(&private_data->event, SDIF_EVENT_CARD_DETECTED);
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fsdif_change();
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}
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static void fsdif_command_done_callback(FSdif *const mmcsd_instance, void *args, u32 status, u32 dmac_status)
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{
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struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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rt_event_send(&private_data->event, SDIF_EVENT_COMMAND_DONE);
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}
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static void fsdif_data_done_callback(FSdif *const mmcsd_instance, void *args, u32 status, u32 dmac_status)
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{
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struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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rt_event_send(&private_data->event, SDIF_EVENT_DATA_DONE);
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}
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static void fsdif_sdio_irq_callback(FSdif *const mmcsd_instance, void *args, u32 status, u32 dmac_status)
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{
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struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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rt_event_send(&private_data->event, SDIF_EVENT_SDIO_IRQ);
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}
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static void fsdif_error_occur_callback(FSdif *const mmcsd_instance, void *args, u32 status, u32 dmac_status)
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{
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struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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rt_event_send(&private_data->event, SDIF_EVENT_ERROR_OCCUR);
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}
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static void fsdif_ctrl_setup_interrupt(struct rt_mmcsd_host *host)
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{
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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FSdif *mmcsd_instance = private_data->mmcsd_instance;
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FSdifConfig *config_p = &mmcsd_instance->config;
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rt_uint32_t cpu_id = 0;
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GetCpuId((u32 *)&cpu_id);
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rt_hw_interrupt_set_target_cpus(config_p->irq_num, cpu_id);
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rt_hw_interrupt_set_priority(config_p->irq_num, 0xd0);
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/* register intr callback */
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rt_hw_interrupt_install(config_p->irq_num,
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FSdifInterruptHandler,
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mmcsd_instance,
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NULL);
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/* enable irq */
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rt_hw_interrupt_umask(config_p->irq_num);
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FSdifRegisterEvtHandler(mmcsd_instance, FSDIF_EVT_CARD_DETECTED, fsdif_card_detect_callback, host);
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FSdifRegisterEvtHandler(mmcsd_instance, FSDIF_EVT_ERR_OCCURE, fsdif_error_occur_callback, host);
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FSdifRegisterEvtHandler(mmcsd_instance, FSDIF_EVT_CMD_DONE, fsdif_command_done_callback, host);
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FSdifRegisterEvtHandler(mmcsd_instance, FSDIF_EVT_DATA_DONE, fsdif_data_done_callback, host);
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FSdifRegisterEvtHandler(mmcsd_instance, FSDIF_EVT_SDIO_IRQ, fsdif_sdio_irq_callback, host);
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return;
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}
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static rt_err_t fsdif_ctrl_init(struct rt_mmcsd_host *host)
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{
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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FSdif *mmcsd_instance = RT_NULL;
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const FSdifConfig *default_mmcsd_config = RT_NULL;
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FSdifConfig mmcsd_config;
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FSdifIDmaDesc *rw_desc = RT_NULL;
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mmcsd_instance = rt_malloc(sizeof(FSdif));
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if (!mmcsd_instance)
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{
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LOG_E("Malloc mmcsd_instance failed");
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return -RT_ERROR;
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}
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rw_desc = rt_malloc_align(SDIF_MAX_BLK_TRANS * sizeof(FSdifIDmaDesc), SDIF_MALLOC_CAP_DESC);
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if (!rw_desc)
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{
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LOG_E("Malloc rw_desc failed");
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return -RT_ERROR;
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}
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rt_memset(mmcsd_instance, 0, sizeof(FSdif));
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rt_memset(rw_desc, 0, SDIF_MAX_BLK_TRANS * sizeof(FSdifIDmaDesc));
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/* SDIF controller init */
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RT_ASSERT((default_mmcsd_config = FSdifLookupConfig(SDIF_CONTROLLER_ID)) != RT_NULL);
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mmcsd_config = *default_mmcsd_config; /* load default config */
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#ifdef RT_USING_SMART
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mmcsd_config.base_addr = (uintptr)rt_ioremap((void *)mmcsd_config.base_addr, 0x1000);
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#endif
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mmcsd_config.trans_mode = FSDIF_IDMA_TRANS_MODE;
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#ifdef USING_EMMC
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mmcsd_config.non_removable = TRUE; /* eMMC is unremovable on board */
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#else
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mmcsd_config.non_removable = FALSE; /* TF card is removable on board */
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#endif
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mmcsd_config.get_tuning = FSdifGetTimingSetting;
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if (FSDIF_SUCCESS != FSdifCfgInitialize(mmcsd_instance, &mmcsd_config))
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{
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LOG_E("SDIF controller init failed.");
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return -RT_ERROR;
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}
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if (FSDIF_SUCCESS != FSdifSetIDMAList(mmcsd_instance, rw_desc, (uintptr)rw_desc + PV_OFFSET, SDIF_MAX_BLK_TRANS))
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{
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LOG_E("SDIF controller setup DMA failed.");
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return -RT_ERROR;
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}
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mmcsd_instance->desc_list.first_desc_dma = (uintptr)rw_desc + PV_OFFSET;
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FSdifRegisterRelaxHandler(mmcsd_instance, fsdif_host_relax); /* SDIF delay for a while */
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private_data->mmcsd_instance = mmcsd_instance;
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private_data->rw_desc = rw_desc;
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fsdif_ctrl_setup_interrupt(host);
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return RT_EOK;
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}
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rt_inline rt_err_t fsdif_dma_transfer(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req, FSdifCmdData *req_cmd)
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{
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FError ret = FT_SUCCESS;
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rt_uint32_t event = 0U;
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rt_uint32_t wait_event = 0U;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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FSdif *mmcsd_instance = private_data->mmcsd_instance;
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if (req_cmd->data_p == RT_NULL)
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{
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wait_event = SDIF_EVENT_COMMAND_DONE;
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}
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else
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{
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wait_event = SDIF_EVENT_COMMAND_DONE | SDIF_EVENT_DATA_DONE;
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}
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ret = FSdifDMATransfer(mmcsd_instance, req_cmd);
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if (ret != FT_SUCCESS)
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{
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LOG_E("FSdifDMATransfer() fail.");
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return -RT_ERROR;
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}
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while (TRUE)
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{
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if (rt_event_recv(&private_data->event,
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(wait_event),
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(RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR | RT_WAITING_NO),
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rt_tick_from_millisecond(5000),
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&event) == RT_EOK)
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{
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(void)FSdifGetCmdResponse(mmcsd_instance, req_cmd);
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break;
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}
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else
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{
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if (rt_event_recv(&private_data->event,
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(SDIF_EVENT_ERROR_OCCUR),
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(RT_EVENT_FLAG_CLEAR | RT_WAITING_NO),
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rt_tick_from_millisecond(5000),
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&event) == RT_EOK)
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{
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LOG_E("Sdif DMA transfer endup with error !!!");
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return -RT_EIO;
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}
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}
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fsdif_host_relax();
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}
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if (resp_type(req->cmd) & RESP_MASK)
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{
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if (resp_type(req->cmd) == RESP_R2)
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{
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req->cmd->resp[3] = req_cmd->response[0];
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req->cmd->resp[2] = req_cmd->response[1];
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req->cmd->resp[1] = req_cmd->response[2];
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req->cmd->resp[0] = req_cmd->response[3];
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}
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else
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{
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req->cmd->resp[0] = req_cmd->response[0];
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}
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}
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return RT_EOK;
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}
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static void fsdif_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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/* ignore some SDIF-ONIY cmd */
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if ((req->cmd->cmd_code == SD_IO_SEND_OP_COND) || (req->cmd->cmd_code == SD_IO_RW_DIRECT))
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{
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req->cmd->err = -1;
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goto skip_cmd;
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}
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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FSdifCmdData req_cmd;
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FSdifCmdData req_stop;
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FSdifData req_data;
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rt_uint32_t *data_buf_aligned = RT_NULL;
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rt_uint32_t cmd_flag = resp_type(req->cmd);
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rt_memset(&req_cmd, 0, sizeof(FSdifCmdData));
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rt_memset(&req_stop, 0, sizeof(FSdifCmdData));
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rt_memset(&req_data, 0, sizeof(FSdifData));
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/* convert req into ft driver type */
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if (req->cmd->cmd_code == GO_IDLE_STATE)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_NEED_INIT;
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}
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if (req->cmd->cmd_code == GO_INACTIVE_STATE)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_NEED_AUTO_STOP;
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}
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if ((cmd_flag != RESP_R3) && (cmd_flag != RESP_R4) && (cmd_flag != RESP_NONE))
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_NEED_RESP_CRC;
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}
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if (cmd_flag & RESP_MASK)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_EXP_RESP;
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if (cmd_flag == RESP_R2)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_EXP_LONG_RESP;
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}
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}
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if (req->data) /* transfer command with data */
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{
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data_buf_aligned = rt_malloc_align(SDIF_DMA_BLK_SZ * req->data->blks, SDIF_DMA_ALIGN);
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if (!data_buf_aligned)
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{
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LOG_E("Malloc data_buf_aligned failed");
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return;
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}
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rt_memset(data_buf_aligned, 0, SDIF_DMA_BLK_SZ * req->data->blks);
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req_cmd.flag |= FSDIF_CMD_FLAG_EXP_DATA;
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req_data.blksz = req->data->blksize;
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req_data.blkcnt = req->data->blks + CONFIG_SDCARD_OFFSET;
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req_data.datalen = req->data->blksize * req->data->blks;
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if ((uintptr)req->data->buf % SDIF_DMA_ALIGN) /* data buffer should be 512-aligned */
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{
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if (req->data->flags & DATA_DIR_WRITE)
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{
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rt_memcpy((void *)data_buf_aligned, (void *)req->data->buf, req_data.datalen);
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}
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req_data.buf = (rt_uint8_t *)data_buf_aligned;
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req_data.buf_dma = (uintptr)data_buf_aligned + PV_OFFSET;
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}
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else
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{
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req_data.buf = (rt_uint8_t *)req->data->buf;
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req_data.buf_dma = (uintptr)req->data->buf + PV_OFFSET;
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}
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req_cmd.data_p = &req_data;
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if (req->data->flags & DATA_DIR_READ)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_READ_DATA;
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}
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else if (req->data->flags & DATA_DIR_WRITE)
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{
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req_cmd.flag |= FSDIF_CMD_FLAG_WRITE_DATA;
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}
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}
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req_cmd.cmdidx = req->cmd->cmd_code;
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req_cmd.cmdarg = req->cmd->arg;
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/* do cmd and data transfer */
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req->cmd->err = (private_data->transfer)(host, req, &req_cmd);
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if (req->cmd->err != RT_EOK)
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{
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LOG_E("transfer failed in %s", __func__);
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}
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if (req->data && (req->data->flags & DATA_DIR_READ))
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{
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if ((uintptr)req->data->buf % SDIF_DMA_ALIGN) /* data buffer should be 512-aligned */
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{
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rt_memcpy((void *)req->data->buf, (void *)data_buf_aligned, req_data.datalen);
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}
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}
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/* stop cmd */
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if (req->stop)
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{
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req_stop.cmdidx = req->stop->cmd_code;
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req_stop.cmdarg = req->stop->arg;
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if (req->stop->flags & RESP_MASK)
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{
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req_stop.flag |= FSDIF_CMD_FLAG_READ_DATA;
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if (resp_type(req->stop) == RESP_R2)
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{
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req_stop.flag |= FSDIF_CMD_FLAG_EXP_LONG_RESP;
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}
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}
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req->stop->err = (private_data->transfer)(host, req, &req_stop);
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}
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if (data_buf_aligned)
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{
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rt_free_align(data_buf_aligned);
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}
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skip_cmd:
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mmcsd_req_complete(host);
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}
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static void fsdif_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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FError ret = FT_SUCCESS;
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fsdif_info_t *private_data = (fsdif_info_t *)host->private_data;
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FSdif *mmcsd_instance = private_data->mmcsd_instance;
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uintptr base_addr = mmcsd_instance->config.base_addr;
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if (0 != io_cfg->clock)
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{
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ret = FSdifSetClkFreq(mmcsd_instance, io_cfg->clock);
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if (ret != FT_SUCCESS)
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{
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LOG_E("FSdifSetClkFreq fail.");
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}
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}
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switch (io_cfg->bus_width)
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{
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case MMCSD_BUS_WIDTH_1:
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FSdifSetBusWidth(base_addr, 1U);
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break;
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case MMCSD_BUS_WIDTH_4:
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FSdifSetBusWidth(base_addr, 4U);
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break;
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case MMCSD_BUS_WIDTH_8:
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FSdifSetBusWidth(base_addr, 8U);
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break;
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default:
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LOG_E("Invalid bus width %d", io_cfg->bus_width);
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break;
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}
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}
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static const struct rt_mmcsd_host_ops ops =
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{
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fsdif_request_send,
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fsdif_set_iocfg,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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};
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void fsdif_change(void)
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{
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mmcsd_change(mmc_host[SDIF_CONTROLLER_ID]);
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}
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int rt_hw_fsdif_init(void)
|
|
{
|
|
/* variables init */
|
|
struct rt_mmcsd_host *host = RT_NULL;
|
|
fsdif_info_t *private_data = RT_NULL;
|
|
rt_err_t result = RT_EOK;
|
|
|
|
host = mmcsd_alloc_host();
|
|
if (!host)
|
|
{
|
|
LOG_E("Alloc host failed");
|
|
goto err_free;
|
|
}
|
|
|
|
private_data = rt_malloc(sizeof(fsdif_info_t));
|
|
if (!private_data)
|
|
{
|
|
LOG_E("Malloc private_data failed");
|
|
goto err_free;
|
|
}
|
|
|
|
rt_memset(private_data, 0, sizeof(fsdif_info_t));
|
|
private_data->transfer = fsdif_dma_transfer;
|
|
result = rt_event_init(&private_data->event, "sdif_event", RT_IPC_FLAG_FIFO);
|
|
RT_ASSERT(RT_EOK == result);
|
|
|
|
/* host data init */
|
|
host->ops = &ops;
|
|
host->freq_min = 400000;
|
|
host->freq_max = 50000000;
|
|
host->valid_ocr = SDIF_VALID_OCR; /* the voltage range supported is 1.65v-3.6v */
|
|
host->flags = MMCSD_MUTBLKWRITE | MMCSD_BUSWIDTH_4;
|
|
host->max_seg_size = SDIF_DMA_BLK_SZ; /* used in block_dev.c */
|
|
host->max_dma_segs = SDIF_MAX_BLK_TRANS; /* physical segment number */
|
|
host->max_blk_size = SDIF_DMA_BLK_SZ; /* all the 4 para limits size of one blk tran */
|
|
host->max_blk_count = SDIF_MAX_BLK_TRANS;
|
|
host->private_data = private_data;
|
|
|
|
mmc_host[SDIF_CONTROLLER_ID] = host;
|
|
|
|
if (RT_EOK != fsdif_ctrl_init(host))
|
|
{
|
|
LOG_E("fsdif_ctrl_init() failed");
|
|
goto err_free;
|
|
}
|
|
|
|
return RT_EOK;
|
|
|
|
err_free:
|
|
if (host)
|
|
{
|
|
rt_free(host);
|
|
}
|
|
if (private_data->mmcsd_instance)
|
|
{
|
|
rt_free(private_data->mmcsd_instance);
|
|
}
|
|
if (private_data->rw_desc)
|
|
{
|
|
rt_free_align(private_data->rw_desc);
|
|
}
|
|
if (private_data)
|
|
{
|
|
rt_free(private_data);
|
|
}
|
|
|
|
return -RT_EOK;
|
|
}
|
|
INIT_DEVICE_EXPORT(rt_hw_fsdif_init);
|
|
#endif // #ifdef RT_USING_SDIO
|