e03342ff6b
- added new boards: hpm5300evk, hpm5301evklite and hpm6800evk - upgaded hpm_sdk - driver updates and bugfixes - add hpmicro BSPs to CI Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
354 lines
11 KiB
C
354 lines
11 KiB
C
/*
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* Copyright (c) 2021-2024 HPMicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef HPM_SOC_H
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#define HPM_SOC_H
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/* List of external IRQs */
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#define IRQn_GPIO0_A 1 /* GPIO0_A IRQ */
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#define IRQn_GPIO0_B 2 /* GPIO0_B IRQ */
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#define IRQn_GPIO0_X 3 /* GPIO0_X IRQ */
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#define IRQn_GPIO0_Y 4 /* GPIO0_Y IRQ */
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#define IRQn_GPTMR0 5 /* GPTMR0 IRQ */
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#define IRQn_GPTMR1 6 /* GPTMR1 IRQ */
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#define IRQn_UART0 13 /* UART0 IRQ */
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#define IRQn_UART1 14 /* UART1 IRQ */
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#define IRQn_UART2 15 /* UART2 IRQ */
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#define IRQn_UART3 16 /* UART3 IRQ */
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#define IRQn_I2C0 21 /* I2C0 IRQ */
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#define IRQn_I2C1 22 /* I2C1 IRQ */
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#define IRQn_I2C2 23 /* I2C2 IRQ */
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#define IRQn_I2C3 24 /* I2C3 IRQ */
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#define IRQn_SPI0 25 /* SPI0 IRQ */
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#define IRQn_SPI1 26 /* SPI1 IRQ */
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#define IRQn_SPI2 27 /* SPI2 IRQ */
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#define IRQn_SPI3 28 /* SPI3 IRQ */
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#define IRQn_TSNS 29 /* TSNS IRQ */
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#define IRQn_MBX0A 30 /* MBX0A IRQ */
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#define IRQn_MBX0B 31 /* MBX0B IRQ */
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#define IRQn_EWDG0 32 /* EWDG0 IRQ */
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#define IRQn_EWDG1 33 /* EWDG1 IRQ */
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#define IRQn_HDMA 34 /* HDMA IRQ */
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#define IRQn_USB0 51 /* USB0 IRQ */
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#define IRQn_XPI0 52 /* XPI0 IRQ */
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#define IRQn_PSEC 54 /* PSEC IRQ */
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#define IRQn_SECMON 55 /* SECMON IRQ */
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#define IRQn_FUSE 57 /* FUSE IRQ */
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#define IRQn_ADC0 58 /* ADC0 IRQ */
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#define IRQn_ACMP_0 62 /* ACMP_0 IRQ */
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#define IRQn_ACMP_1 63 /* ACMP_1 IRQ */
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#define IRQn_SYSCTL 64 /* SYSCTL IRQ */
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#define IRQn_PGPIO 65 /* PGPIO IRQ */
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#define IRQn_PTMR 66 /* PTMR IRQ */
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#define IRQn_PUART 67 /* PUART IRQ */
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#define IRQn_PEWDG 68 /* PEWDG IRQ */
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#define IRQn_BROWNOUT 69 /* BROWNOUT IRQ */
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#define IRQn_PAD_WAKEUP 70 /* PAD_WAKEUP IRQ */
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#define IRQn_DEBUG0 71 /* DEBUG0 IRQ */
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#define IRQn_DEBUG1 72 /* DEBUG1 IRQ */
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#include "hpm_common.h"
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#include "hpm_gpio_regs.h"
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/* Address of GPIO instances */
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/* FGPIO base address */
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#define HPM_FGPIO_BASE (0xC0000UL)
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/* FGPIO base pointer */
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#define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
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/* GPIO0 base address */
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#define HPM_GPIO0_BASE (0xF00D0000UL)
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/* GPIO0 base pointer */
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#define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
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/* PGPIO base address */
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#define HPM_PGPIO_BASE (0xF411C000UL)
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/* PGPIO base pointer */
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#define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
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/* Address of DM instances */
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/* DM base address */
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#define HPM_DM_BASE (0x30000000UL)
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#include "hpm_plic_regs.h"
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/* Address of PLIC instances */
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/* PLIC base address */
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#define HPM_PLIC_BASE (0xE4000000UL)
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/* PLIC base pointer */
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#define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
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#include "hpm_mchtmr_regs.h"
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/* Address of MCHTMR instances */
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/* MCHTMR base address */
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#define HPM_MCHTMR_BASE (0xE6000000UL)
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/* MCHTMR base pointer */
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#define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
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#include "hpm_plic_sw_regs.h"
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/* Address of PLICSW instances */
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/* PLICSW base address */
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#define HPM_PLICSW_BASE (0xE6400000UL)
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/* PLICSW base pointer */
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#define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
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#include "hpm_gptmr_regs.h"
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/* Address of TMR instances */
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/* GPTMR0 base address */
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#define HPM_GPTMR0_BASE (0xF0000000UL)
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/* GPTMR0 base pointer */
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#define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
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/* GPTMR1 base address */
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#define HPM_GPTMR1_BASE (0xF0004000UL)
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/* GPTMR1 base pointer */
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#define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
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/* PTMR base address */
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#define HPM_PTMR_BASE (0xF4120000UL)
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/* PTMR base pointer */
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#define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
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#include "hpm_uart_regs.h"
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/* Address of UART instances */
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/* UART0 base address */
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#define HPM_UART0_BASE (0xF0040000UL)
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/* UART0 base pointer */
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#define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
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/* UART1 base address */
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#define HPM_UART1_BASE (0xF0044000UL)
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/* UART1 base pointer */
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#define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
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/* UART2 base address */
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#define HPM_UART2_BASE (0xF0048000UL)
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/* UART2 base pointer */
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#define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
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/* UART3 base address */
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#define HPM_UART3_BASE (0xF004C000UL)
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/* UART3 base pointer */
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#define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
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/* PUART base address */
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#define HPM_PUART_BASE (0xF4124000UL)
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/* PUART base pointer */
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#define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
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#include "hpm_i2c_regs.h"
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/* Address of I2C instances */
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/* I2C0 base address */
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#define HPM_I2C0_BASE (0xF0060000UL)
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/* I2C0 base pointer */
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#define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
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/* I2C1 base address */
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#define HPM_I2C1_BASE (0xF0064000UL)
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/* I2C1 base pointer */
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#define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
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/* I2C2 base address */
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#define HPM_I2C2_BASE (0xF0068000UL)
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/* I2C2 base pointer */
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#define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
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/* I2C3 base address */
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#define HPM_I2C3_BASE (0xF006C000UL)
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/* I2C3 base pointer */
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#define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
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#include "hpm_spi_regs.h"
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/* Address of SPI instances */
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/* SPI0 base address */
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#define HPM_SPI0_BASE (0xF0070000UL)
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/* SPI0 base pointer */
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#define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
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/* SPI1 base address */
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#define HPM_SPI1_BASE (0xF0074000UL)
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/* SPI1 base pointer */
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#define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
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/* SPI2 base address */
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#define HPM_SPI2_BASE (0xF0078000UL)
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/* SPI2 base pointer */
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#define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
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/* SPI3 base address */
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#define HPM_SPI3_BASE (0xF007C000UL)
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/* SPI3 base pointer */
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#define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
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#include "hpm_crc_regs.h"
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/* Address of CRC instances */
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/* CRC base address */
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#define HPM_CRC_BASE (0xF0080000UL)
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/* CRC base pointer */
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#define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
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#include "hpm_tsns_regs.h"
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/* Address of TSNS instances */
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/* TSNS base address */
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#define HPM_TSNS_BASE (0xF0090000UL)
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/* TSNS base pointer */
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#define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
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#include "hpm_mbx_regs.h"
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/* Address of MBX instances */
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/* MBX0A base address */
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#define HPM_MBX0A_BASE (0xF00A0000UL)
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/* MBX0A base pointer */
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#define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
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/* MBX0B base address */
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#define HPM_MBX0B_BASE (0xF00A4000UL)
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/* MBX0B base pointer */
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#define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
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#include "hpm_ewdg_regs.h"
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/* Address of EWDG instances */
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/* EWDG0 base address */
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#define HPM_EWDG0_BASE (0xF00B0000UL)
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/* EWDG0 base pointer */
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#define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
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/* EWDG1 base address */
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#define HPM_EWDG1_BASE (0xF00B4000UL)
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/* EWDG1 base pointer */
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#define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
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/* PEWDG base address */
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#define HPM_PEWDG_BASE (0xF4128000UL)
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/* PEWDG base pointer */
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#define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
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#include "hpm_dmamux_regs.h"
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/* Address of DMAMUX instances */
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/* DMAMUX base address */
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#define HPM_DMAMUX_BASE (0xF00C4000UL)
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/* DMAMUX base pointer */
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#define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
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#include "hpm_dmav2_regs.h"
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/* Address of DMAV2 instances */
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/* HDMA base address */
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#define HPM_HDMA_BASE (0xF00C8000UL)
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/* HDMA base pointer */
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#define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
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#include "hpm_gpiom_regs.h"
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/* Address of GPIOM instances */
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/* GPIOM base address */
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#define HPM_GPIOM_BASE (0xF00D8000UL)
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/* GPIOM base pointer */
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#define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
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#include "hpm_usb_regs.h"
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/* Address of USB instances */
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/* USB0 base address */
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#define HPM_USB0_BASE (0xF300C000UL)
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/* USB0 base pointer */
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#define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
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/* Address of ROMC instances */
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/* ROMC base address */
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#define HPM_ROMC_BASE (0xF3014000UL)
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#include "hpm_sec_regs.h"
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/* Address of SEC instances */
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/* SEC base address */
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#define HPM_SEC_BASE (0xF3044000UL)
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/* SEC base pointer */
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#define HPM_SEC ((SEC_Type *) HPM_SEC_BASE)
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#include "hpm_mon_regs.h"
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/* Address of MON instances */
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/* MON base address */
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#define HPM_MON_BASE (0xF3048000UL)
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/* MON base pointer */
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#define HPM_MON ((MON_Type *) HPM_MON_BASE)
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#include "hpm_otp_regs.h"
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/* Address of OTP instances */
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/* OTP base address */
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#define HPM_OTP_BASE (0xF3050000UL)
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/* OTP base pointer */
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#define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
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#include "hpm_keym_regs.h"
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/* Address of KEYM instances */
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/* KEYM base address */
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#define HPM_KEYM_BASE (0xF3054000UL)
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/* KEYM base pointer */
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#define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
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#include "hpm_adc16_regs.h"
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/* Address of ADC16 instances */
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/* ADC0 base address */
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#define HPM_ADC0_BASE (0xF3080000UL)
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/* ADC0 base pointer */
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#define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
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#include "hpm_acmp_regs.h"
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/* Address of ACMP instances */
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/* ACMP base address */
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#define HPM_ACMP_BASE (0xF30B0000UL)
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/* ACMP base pointer */
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#define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
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#include "hpm_sysctl_regs.h"
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/* Address of SYSCTL instances */
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/* SYSCTL base address */
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#define HPM_SYSCTL_BASE (0xF4000000UL)
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/* SYSCTL base pointer */
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#define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
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#include "hpm_ioc_regs.h"
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/* Address of IOC instances */
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/* IOC base address */
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#define HPM_IOC_BASE (0xF4040000UL)
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/* IOC base pointer */
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#define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
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/* PIOC base address */
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#define HPM_PIOC_BASE (0xF4118000UL)
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/* PIOC base pointer */
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#define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
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#include "hpm_pllctlv2_regs.h"
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/* Address of PLLCTLV2 instances */
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/* PLLCTLV2 base address */
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#define HPM_PLLCTLV2_BASE (0xF40C0000UL)
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/* PLLCTLV2 base pointer */
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#define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
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#include "hpm_ppor_regs.h"
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/* Address of PPOR instances */
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/* PPOR base address */
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#define HPM_PPOR_BASE (0xF4100000UL)
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/* PPOR base pointer */
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#define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
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#include "hpm_pcfg_regs.h"
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/* Address of PCFG instances */
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/* PCFG base address */
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#define HPM_PCFG_BASE (0xF4104000UL)
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/* PCFG base pointer */
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#define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
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#include "hpm_pgpr_regs.h"
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/* Address of PGPR instances */
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/* PGPR0 base address */
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#define HPM_PGPR0_BASE (0xF4110000UL)
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/* PGPR0 base pointer */
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#define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
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/* PGPR1 base address */
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#define HPM_PGPR1_BASE (0xF4114000UL)
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/* PGPR1 base pointer */
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#define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
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#include "hpm_pdgo_regs.h"
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/* Address of PDGO instances */
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/* PDGO base address */
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#define HPM_PDGO_BASE (0xF4134000UL)
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/* PDGO base pointer */
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#define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
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#include "riscv/riscv_core.h"
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#include "hpm_csr_regs.h"
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#include "hpm_interrupt.h"
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#include "hpm_misc.h"
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#include "hpm_dmamux_src.h"
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#include "hpm_iomux.h"
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#include "hpm_pmic_iomux.h"
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#endif /* HPM_SOC_H */
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