c802fcdcf8
WCH CH569W-R0-1v0 evt board bsp port, first version dev/test under Ubuntu 20.04 toolchain from MounRiver_Studio_Community_Linux_x64_V120 tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling) libcpu/risc-v/SConscript : group includes rtconfig.CPU only if folder exists libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() : make it RT_WEAK for customization
32 lines
807 B
C
32 lines
807 B
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-07-27 Emuzit first version
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*/
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#ifndef __ISR_SP_H__
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#define __ISR_SP_H__
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/* usrstack is no more in use right after rt_system_scheduler_start().
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* It is also the time global interrupt is enabled.
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*/
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#define isr_sp_enter() \
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asm("la t0, rt_interrupt_nest"); \
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asm("bnez t0, 1f"); \
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asm("la t0, _eusrstack"); \
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asm("sw sp, -4(t0)"); \
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asm("addi sp, t0, -4"); \
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asm("1:")
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#define isr_sp_leave() \
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asm("la t0, rt_interrupt_nest"); \
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asm("bnez t0, 1f"); \
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asm("la t0, _eusrstack"); \
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asm("lw sp, -4(t0)"); \
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asm("1:")
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#endif
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