413 lines
8.3 KiB
C
413 lines
8.3 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-03-16 Leo first version
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*/
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#include <board.h>
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#include "drv_hwtimer.h"
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#define DRV_DEBUG
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#define LOG_TAG "drv.hwtimer"
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#include <drv_log.h>
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#ifdef BSP_USING_HWTIMER
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enum
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{
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#ifdef BSP_USING_HWTMR1
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TMR1_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR2
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TMR2_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR3
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TMR3_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR4
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TMR4_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR5
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TMR5_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR6
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TMR6_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR7
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TMR7_INDEX,
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#endif
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#ifdef BSP_USING_HW_TMR8
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TMR8_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR9
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TMR9_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR10
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TMR10_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR11
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TMR11_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR12
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TMR12_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR13
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TMR13_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR14
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TMR14_INDEX,
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#endif
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#ifdef BSP_USING_HWTMR15
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TMR15_INDEX,
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#endif
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};
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struct at32_hwtimer
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{
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rt_hwtimer_t time_device;
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TMR_Type* tim_handle;
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IRQn_Type tim_irqn;
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char *name;
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};
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static struct at32_hwtimer at32_hwtimer_obj[] =
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{
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#ifdef BSP_USING_HWTMR1
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TMR1_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR2
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TMR2_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR3
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TMR3_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR4
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TMR4_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR5
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TMR5_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR6
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TMR6_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR7
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TMR7_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR8
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TMR8_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR9
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TMR9_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR10
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TMR10_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR11
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TMR11_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR12
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TMR12_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR13
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TMR13_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR14
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TMR14_CONFIG,
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#endif
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#ifdef BSP_USING_HWTMR15
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TMR15_CONFIG,
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#endif
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};
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static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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{
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RCC_ClockType RCC_ClockStruct;
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TMR_TimerBaseInitType TMR_TMReBaseStructure;
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NVIC_InitType NVIC_InitStructure;
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uint32_t prescaler_value = 0;
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TMR_Type *tim = RT_NULL;
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struct at32_hwtimer *tim_device = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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if (state)
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{
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tim = (TMR_Type *)timer->parent.user_data;
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tim_device = (struct at32_hwtimer *)timer;
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/* timer clock enable */
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at32_msp_hwtmr_init(tim);
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/* timer init */
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RCC_GetClocksFreq(&RCC_ClockStruct);
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/* Set timer clock is 1Mhz */
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prescaler_value = (uint32_t)(RCC_ClockStruct.SYSCLK_Freq / 10000) - 1;
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TMR_TMReBaseStructure.TMR_Period = 10000 - 1;
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TMR_TMReBaseStructure.TMR_DIV = prescaler_value;
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TMR_TMReBaseStructure.TMR_ClockDivision = TMR_CKD_DIV1;
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TMR_TMReBaseStructure.TMR_RepetitionCounter = 0;
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if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
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{
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TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up;
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}
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else
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{
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TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Down;
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}
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TMR_TimeBaseInit(tim, &TMR_TMReBaseStructure);
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/* Enable the TMRx global Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = tim_device->tim_irqn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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TMR_INTConfig(tim, TMR_INT_Overflow ,ENABLE);
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TMR_ClearITPendingBit(tim, TMR_INT_Overflow);
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LOG_D("%s init success", tim_device->name);
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}
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}
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static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
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{
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rt_err_t result = RT_EOK;
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TMR_Type *tim = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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tim = (TMR_Type *)timer->parent.user_data;
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/* set tim cnt */
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TMR_SetCounter(tim, 0);
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/* set tim arr */
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TMR_SetAutoreload(tim, t - 1);
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if (opmode == HWTIMER_MODE_ONESHOT)
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{
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/* set timer to single mode */
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TMR_SelectOnePulseMode(tim, TMR_OPMode_Once);
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}
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else
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{
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TMR_SelectOnePulseMode(tim, TMR_OPMode_Repetitive);
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}
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/* start timer */
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TMR_Cmd(tim, ENABLE);
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return result;
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}
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static void at32_timer_stop(rt_hwtimer_t *timer)
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{
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TMR_Type *tim = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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tim = (TMR_Type *)timer->parent.user_data;
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/* stop timer */
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TMR_Cmd(tim, ENABLE);
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/* set tim cnt */
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TMR_SetCounter(tim, 0);
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}
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static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer)
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{
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TMR_Type *tim = RT_NULL;
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RT_ASSERT(timer != RT_NULL);
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tim = (TMR_Type *)timer->parent.user_data;
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return tim->CNT;
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}
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static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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{
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RCC_ClockType RCC_ClockStruct;
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TMR_Type *tim = RT_NULL;
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rt_err_t result = RT_EOK;
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RT_ASSERT(timer != RT_NULL);
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RT_ASSERT(arg != RT_NULL);
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tim = (TMR_Type *)timer->parent.user_data;
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switch(cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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rt_uint32_t freq;
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rt_uint16_t val;
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/* set timer frequence */
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freq = *((rt_uint32_t *)arg);
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/* time init */
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RCC_GetClocksFreq(&RCC_ClockStruct);
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val = RCC_ClockStruct.SYSCLK_Freq / freq;
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TMR_DIVConfig(tim, val - 1, TMR_DIVReloadMode_Immediate);
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}
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break;
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default:
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{
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result = -RT_ENOSYS;
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}
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break;
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}
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return result;
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}
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static const struct rt_hwtimer_info _info = TMR_DEV_INFO_CONFIG;
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static const struct rt_hwtimer_ops _ops =
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{
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.init = at32_timer_init,
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.start = at32_timer_start,
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.stop = at32_timer_stop,
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.count_get = at32_timer_counter_get,
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.control = at32_timer_ctrl,
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};
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#ifdef BSP_USING_HWTMR2
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void TMR2_GLOBAL_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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if(TMR_GetINTStatus(TMR2, TMR_INT_Overflow) == SET)
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{
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rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].time_device);
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TMR_ClearITPendingBit(TMR2, TMR_INT_Overflow);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_HWTMR3
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void TMR3_GLOBAL_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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if(TMR_GetINTStatus(TMR3, TMR_INT_Overflow) == SET)
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{
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rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].time_device);
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TMR_ClearITPendingBit(TMR3, TMR_INT_Overflow);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_HWTMR4
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void TMR4_GLOBAL_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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if(TMR_GetINTStatus(TMR4, TMR_INT_Overflow) == SET)
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{
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rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].time_device);
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TMR_ClearITPendingBit(TMR4, TMR_INT_Overflow);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_HWTMR5
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void TMR5_GLOBAL_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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if(TMR_GetINTStatus(TMR5, TMR_INT_Overflow) == SET)
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{
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rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].time_device);
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TMR_ClearITPendingBit(TMR5, TMR_INT_Overflow);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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static int rt_hw_hwtimer_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(at32_hwtimer_obj) / sizeof(at32_hwtimer_obj[0]); i++)
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{
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at32_hwtimer_obj[i].time_device.info = &_info;
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at32_hwtimer_obj[i].time_device.ops = &_ops;
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if (rt_device_hwtimer_register(&at32_hwtimer_obj[i].time_device, at32_hwtimer_obj[i].name, at32_hwtimer_obj[i].tim_handle) == RT_EOK)
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{
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LOG_D("%s register success", at32_hwtimer_obj[i].name);
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}
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else
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{
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LOG_E("%s register failed", at32_hwtimer_obj[i].name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
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#endif /* BSP_USING_HWTIMER */
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