624 lines
20 KiB
C
624 lines
20 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-19 Nations first version
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*/
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#include <drv_usart.h>
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#ifdef RT_USING_SERIAL
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#if defined(BSP_USING_USART1) || defined(BSP_USING_USART2) || \
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defined(BSP_USING_USART3) || defined(BSP_USING_UART4) || \
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defined(BSP_USING_UART5) || defined(BSP_USING_UART6) || \
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defined(BSP_USING_UART7)
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#include <rtdevice.h>
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/* n32 uart driver */
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// Todo: compress uart info
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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struct n32_uart
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{
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USART_Module* uart_periph; //Todo: 3bits
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IRQn_Type irqn; //Todo: 7bits
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uint32_t per_clk; //Todo: 5bits
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uint32_t tx_gpio_clk; //Todo: 5bits
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uint32_t rx_gpio_clk; //Todo: 5bits
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GPIO_Module* tx_port; //Todo: 4bits
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GPIO_ModeType tx_af; //Todo: 4bits
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uint16_t tx_pin; //Todo: 4bits
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GPIO_Module* rx_port; //Todo: 4bits
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GPIO_ModeType rx_af; //Todo: 4bits
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uint16_t rx_pin; //Todo: 4bits
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struct rt_serial_device * serial;
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char *device_name;
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};
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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struct n32_uart
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{
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USART_Module* uart_periph; // Todo: 3bits
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IRQn_Type irqn; // Todo: 7bits
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uint32_t per_clk; // Todo: 5bits
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uint32_t tx_gpio_clk; // Todo: 5bits
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uint32_t rx_gpio_clk; // Todo: 5bits
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GPIO_Module* tx_port; // Todo: 4bits
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uint32_t tx_af; // Todo: 4bits
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uint16_t tx_pin; // Todo: 4bits
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GPIO_Module* rx_port; // Todo: 4bits
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uint32_t rx_af; // Todo: 4bits
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uint16_t rx_pin; // Todo: 4bits
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struct rt_serial_device * serial;
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char *device_name;
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};
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#endif
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static void uart_isr(struct rt_serial_device *serial);
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#ifdef BSP_USING_USART1
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struct rt_serial_device serial1;
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void USART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_USART1 */
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#ifdef BSP_USING_USART2
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_USART2 */
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#ifdef BSP_USING_USART3
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struct rt_serial_device serial3;
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void USART3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial3);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_USART3 */
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#ifdef BSP_USING_UART4
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struct rt_serial_device serial4;
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void UART4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial4);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART4 */
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#ifdef BSP_USING_UART5
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struct rt_serial_device serial5;
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void UART5_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial5);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART5 */
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#ifdef BSP_USING_UART6
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struct rt_serial_device serial6;
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void UART6_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial6);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART6 */
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#ifdef BSP_USING_UART7
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struct rt_serial_device serial7;
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void UART7_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial7);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART7 */
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static const struct n32_uart uarts[] = {
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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#ifdef BSP_USING_USART1
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{
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USART1, // uart peripheral index
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USART1_IRQn, // uart iqrn
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RCC_APB2_PERIPH_USART1, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_Mode_AF_PP, GPIO_PIN_9, // tx port, tx alternate, tx pin
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GPIOA, GPIO_Mode_IN_FLOATING, GPIO_PIN_10, // rx port, rx alternate, rx pin
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&serial1,
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"usart1",
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},
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#endif
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#ifdef BSP_USING_USART2
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{
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USART2, // uart peripheral index
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USART2_IRQn, // uart iqrn
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RCC_APB1_PERIPH_USART2, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_Mode_AF_PP, GPIO_PIN_2, // tx port, tx alternate, tx pin
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GPIOA, GPIO_Mode_IN_FLOATING, GPIO_PIN_3, // rx port, rx alternate, rx pin
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&serial2,
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"usart2",
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},
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#endif
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#ifdef BSP_USING_USART3
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{
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USART3, // uart peripheral index
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USART3_IRQn, // uart iqrn
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RCC_APB1_PERIPH_USART3, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_Mode_AF_PP, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOB, GPIO_Mode_IN_FLOATING, GPIO_PIN_11, // rx port, rx alternate, rx pin
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&serial3,
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"usart3",
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},
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#endif
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#ifdef BSP_USING_UART4
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{
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UART4, // uart peripheral index
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UART4_IRQn, // uart iqrn
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RCC_APB1_PERIPH_UART4, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_Mode_AF_PP, GPIO_PIN_13, // tx port, tx alternate, tx pin
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GPIOA, GPIO_Mode_IN_FLOATING, GPIO_PIN_14, // rx port, rx alternate, rx pin
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&serial4,
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"uart4",
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},
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#endif
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#ifdef BSP_USING_UART5
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{
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UART5, // uart peripheral index
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UART5_IRQn, // uart iqrn
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RCC_APB1_PERIPH_UART5, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_Mode_AF_PP, GPIO_PIN_13, // tx port, tx alternate, tx pin
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GPIOB, GPIO_Mode_IN_FLOATING, GPIO_PIN_14, // rx port, rx alternate, rx pin
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&serial5,
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"uart5",
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},
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#endif
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#ifdef BSP_USING_UART6
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{
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UART6, // uart peripheral index
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UART6_IRQn, // uart iqrn
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RCC_APB2_PERIPH_UART6, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_Mode_AF_PP, GPIO_PIN_0, // tx port, tx alternate, tx pin
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GPIOB, GPIO_Mode_IN_FLOATING, GPIO_PIN_1, // rx port, rx alternate, rx pin
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&serial6,
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"uart6",
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},
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#endif
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#ifdef BSP_USING_UART7
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{
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UART7, // uart peripheral index
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UART7_IRQn, // uart iqrn
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RCC_APB2_PERIPH_UART7, RCC_APB2_PERIPH_GPIOC, RCC_APB2_PERIPH_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_Mode_AF_PP, GPIO_PIN_2, // tx port, tx alternate, tx pin
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GPIOC, GPIO_Mode_IN_FLOATING, GPIO_PIN_3, // rx port, rx alternate, rx pin
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&serial7,
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"uart7",
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},
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#endif
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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#ifdef BSP_USING_USART1
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{
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USART1, // uart peripheral index
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USART1_IRQn, // uart iqrn
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RCC_APB2_PERIPH_USART1, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_AF4_USART1, GPIO_PIN_9, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF4_USART1, GPIO_PIN_10, // rx port, rx alternate, rx pin
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&serial1,
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"usart1",
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},
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#endif
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#ifdef BSP_USING_USART2
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{
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USART2, // uart peripheral index
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USART2_IRQn, // uart iqrn
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RCC_APB1_PERIPH_USART2, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_AF4_USART2, GPIO_PIN_2, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF4_USART2, GPIO_PIN_3, // rx port, rx alternate, rx pin
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&serial2,
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"usart2",
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},
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#endif
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#ifdef BSP_USING_USART3
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{
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USART3, // uart peripheral index
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USART3_IRQn, // uart iqrn
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RCC_APB1_PERIPH_USART3, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_AF0_USART3, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOB, GPIO_AF5_USART3, GPIO_PIN_11, // rx port, rx alternate, rx pin
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&serial3,
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"usart3",
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},
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#endif
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#ifdef BSP_USING_UART4
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{
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UART4, // uart peripheral index
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UART4_IRQn, // uart iqrn
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RCC_APB2_PERIPH_UART4, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_AF6_UART4, GPIO_PIN_0, // tx port, tx alternate, tx pin
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GPIOB, GPIO_AF6_UART4, GPIO_PIN_1, // rx port, rx alternate, rx pin
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&serial4,
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"uart4",
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},
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#endif
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#ifdef BSP_USING_UART5
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{
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UART5, // uart peripheral index
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UART5_IRQn, // uart iqrn
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RCC_APB2_PERIPH_UART5, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_AF6_UART5, GPIO_PIN_8, // tx port, tx alternate, tx pin
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GPIOB, GPIO_AF6_UART5, GPIO_PIN_9, // rx port, rx alternate, rx pin
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&serial5,
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"uart5",
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},
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#endif
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#endif
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};
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/**
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* @brief UART MSP Initialization
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* This function configures the hardware resources used in this example:
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* - Peripheral's clock enable
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* - Peripheral's GPIO Configuration
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* - NVIC configuration for UART interrupt request enable
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* @param huart: UART handle pointer
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* @retval None
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*/
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void n32_uart_gpio_init(struct n32_uart *uart, struct serial_configure *cfg)
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{
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GPIO_InitType GPIO_InitStructure;
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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/* enable USART clock */
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RCC_EnableAPB2PeriphClk(uart->tx_gpio_clk | uart->rx_gpio_clk | RCC_APB2_PERIPH_AFIO, ENABLE);
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if (uart->uart_periph == USART1 || uart->uart_periph == UART6 || uart->uart_periph == UART7)
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{
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RCC_EnableAPB2PeriphClk(uart->per_clk, ENABLE);
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}
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else
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{
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RCC_EnableAPB1PeriphClk(uart->per_clk, ENABLE);
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}
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#ifdef BSP_USING_UART4
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GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_DISABLE, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP2_UART4, ENABLE);
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#endif /* BSP_USING_UART4 */
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#ifdef BSP_USING_UART5
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GPIO_ConfigPinRemap(GPIO_RMP1_UART5, ENABLE);
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#endif /* BSP_USING_UART5 */
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#ifdef BSP_USING_UART6
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GPIO_ConfigPinRemap(GPIO_RMP3_UART6, ENABLE);
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#endif /* BSP_USING_UART6 */
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#ifdef BSP_USING_UART7
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GPIO_ConfigPinRemap(GPIO_RMP1_UART7, ENABLE);
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#endif /* BSP_USING_UART7 */
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Config USARTx_TX I/O */
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GPIO_InitStructure.Pin = uart->tx_pin;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = uart->tx_af;
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GPIO_InitPeripheral(uart->tx_port, &GPIO_InitStructure);
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/* Config USARTx_RX I/O */
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GPIO_InitStructure.Pin = uart->rx_pin;
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GPIO_InitStructure.GPIO_Mode = uart->rx_af;
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GPIO_InitPeripheral(uart->rx_port, &GPIO_InitStructure);
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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/* enable USART clock */
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RCC_EnableAPB2PeriphClk(uart->tx_gpio_clk | uart->rx_gpio_clk | RCC_APB2_PERIPH_AFIO, ENABLE);
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if (uart->uart_periph == USART1 || uart->uart_periph == UART4 || uart->uart_periph == UART5)
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{
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RCC_EnableAPB2PeriphClk(uart->per_clk, ENABLE);
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}
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else
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{
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RCC_EnableAPB1PeriphClk(uart->per_clk, ENABLE);
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}
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GPIO_InitStruct(&GPIO_InitStructure);
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/* connect port to USARTx_Tx */
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GPIO_InitStructure.Pin = uart->tx_pin;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Alternate = uart->tx_af;
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GPIO_InitPeripheral(uart->tx_port, &GPIO_InitStructure);
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/* connect port to USARTx_Rx */
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GPIO_InitStructure.Pin = uart->rx_pin;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Alternate = uart->rx_af;
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GPIO_InitPeripheral(uart->rx_port, &GPIO_InitStructure);
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#endif
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NVIC_SetPriority(uart->irqn, 0);
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NVIC_EnableIRQ(uart->irqn);
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}
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static rt_err_t n32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct n32_uart *uart;
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USART_InitType USART_InitStructure;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = (struct n32_uart *)serial->parent.user_data;
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n32_uart_gpio_init(uart, cfg);
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USART_InitStructure.BaudRate = cfg->baud_rate;
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switch (cfg->data_bits)
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{
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case DATA_BITS_9:
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USART_InitStructure.WordLength = USART_WL_9B;
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break;
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default:
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USART_InitStructure.WordLength = USART_WL_8B;;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1:
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USART_InitStructure.StopBits = USART_STPB_1;
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break;
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case STOP_BITS_2:
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USART_InitStructure.StopBits = USART_STPB_0_5;
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break;
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case STOP_BITS_3:
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USART_InitStructure.StopBits = USART_STPB_2;
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break;
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case STOP_BITS_4:
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USART_InitStructure.StopBits = USART_STPB_1_5;
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break;
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default:
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_ODD:
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USART_InitStructure.Parity = USART_PE_ODD;
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break;
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case PARITY_EVEN:
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USART_InitStructure.Parity = USART_PE_EVEN;
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break;
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case PARITY_NONE:
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USART_InitStructure.Parity = USART_PE_NO;
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break;
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default:
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break;
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}
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switch (cfg->flowcontrol)
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{
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case RT_SERIAL_FLOWCONTROL_NONE:
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
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break;
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case RT_SERIAL_FLOWCONTROL_CTSRTS:
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_RTS_CTS;
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break;
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default:
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
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break;
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}
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USART_InitStructure.Mode = USART_MODE_TX | USART_MODE_RX;
|
|
|
|
USART_Init(uart->uart_periph, &USART_InitStructure);
|
|
|
|
USART_Enable(uart->uart_periph, ENABLE);
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
static rt_err_t n32_control(struct rt_serial_device *serial, int cmd, void *arg)
|
|
{
|
|
struct n32_uart *uart;
|
|
NVIC_InitType NVIC_InitStructure;
|
|
|
|
/* Configure the NVIC Preemption Priority Bits */
|
|
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = (struct n32_uart *)serial->parent.user_data;
|
|
|
|
switch (cmd)
|
|
{
|
|
case RT_DEVICE_CTRL_CLR_INT:
|
|
/* disable rx irq */
|
|
NVIC_InitStructure.NVIC_IRQChannel = uart->irqn;
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
|
|
NVIC_Init(&NVIC_InitStructure);
|
|
/* disable interrupt */
|
|
USART_ConfigInt(uart->uart_periph, USART_INT_RXDNE, DISABLE);
|
|
break;
|
|
|
|
case RT_DEVICE_CTRL_SET_INT:
|
|
/* enable rx irq */
|
|
NVIC_InitStructure.NVIC_IRQChannel = uart->irqn;
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
NVIC_Init(&NVIC_InitStructure);
|
|
|
|
/* enable interrupt */
|
|
USART_ConfigInt(uart->uart_periph, USART_INT_RXDNE, ENABLE);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
|
|
}
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
static int n32_putc(struct rt_serial_device *serial, char ch)
|
|
{
|
|
struct n32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = (struct n32_uart *)serial->parent.user_data;
|
|
|
|
USART_SendData(uart->uart_periph, ch);
|
|
while ((USART_GetFlagStatus(uart->uart_periph, USART_FLAG_TXDE) == RESET));
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int n32_getc(struct rt_serial_device *serial)
|
|
{
|
|
int ch;
|
|
struct n32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = (struct n32_uart *)serial->parent.user_data;
|
|
|
|
ch = -1;
|
|
if (USART_GetFlagStatus(uart->uart_periph, USART_FLAG_RXDNE) != RESET)
|
|
{
|
|
ch = USART_ReceiveData(uart->uart_periph);
|
|
}
|
|
|
|
return ch;
|
|
}
|
|
|
|
/**
|
|
* Uart common interrupt process. This need add to uart ISR.
|
|
*
|
|
* @param serial serial device
|
|
*/
|
|
static void uart_isr(struct rt_serial_device *serial)
|
|
{
|
|
struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
|
|
|
|
RT_ASSERT(uart != RT_NULL);
|
|
|
|
/* UART in mode Receiver -------------------------------------------------*/
|
|
if (USART_GetIntStatus(uart->uart_periph, USART_INT_RXDNE) != RESET &&
|
|
USART_GetFlagStatus(uart->uart_periph, USART_FLAG_RXDNE) != RESET)
|
|
{
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
|
}
|
|
|
|
if (USART_GetIntStatus(uart->uart_periph, USART_INT_TXDE) != RESET &&
|
|
USART_GetFlagStatus(uart->uart_periph, USART_FLAG_TXDE) != RESET)
|
|
{
|
|
/* Write one byte to the transmit data register */
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
|
|
|
}
|
|
}
|
|
|
|
static const struct rt_uart_ops n32_uart_ops =
|
|
{
|
|
n32_configure,
|
|
n32_control,
|
|
n32_putc,
|
|
n32_getc,
|
|
};
|
|
|
|
int rt_hw_usart_init(void)
|
|
{
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
int i;
|
|
|
|
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
|
|
{
|
|
uarts[i].serial->ops = &n32_uart_ops;
|
|
uarts[i].serial->config = config;
|
|
|
|
/* register UART device */
|
|
rt_hw_serial_register(uarts[i].serial,
|
|
uarts[i].device_name,
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
(void *)&uarts[i]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
INIT_BOARD_EXPORT(rt_hw_usart_init);
|
|
|
|
#endif /* defined(BSP_USING_USARTx) */
|
|
#endif /* BSP_USING_SERIAL */
|