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README.md
CY8CPROTO-062S3-4343W BSP
Overview
The CY8CPROTO-062S3-4343W Kit is a low-cost hardware platform that enables design and debug of the PSoC™ 6 MCUs.It comes with a Murata LBEE5KL1DX module, based on the CYW4343W combo device, industry-leading CAPSENSE™ for touch buttons and slider, on-board debugger/programmer with KitProg3, 512-Mb Quad-SPI NOR flash. This kit is designed with a snap-away form-factor, allowing the user to separate the different components and features that come with this kit and use independently.
To use code from the BSP, simply include a reference to cybsp.h.
Features
Kit Features:
- Support of up to 512 KB Flash and 256 KB SRAM
- Dedicated SDHC to interface with WICED wireless devices.
- Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-MHz Arm Cortex-M0+ as the secondary processor for low-power operations.
- Supports Full-Speed USB, capacitive-sensing with CAPSENSE.
Kit Contents:
- CY8CPROTO-062S3-4343W board
- USB Type-A to Micro-B cable
- Quick Start Guide
BSP Configuration
The BSP has a few hooks that allow its behavior to be configured. Some of these items are enabled by default while others must be explicitly enabled. Items enabled by default are specified in the CY8CPROTO-062S3-4343W.mk file. The items that are enabled can be changed by creating a custom BSP or by editing the application makefile.
Components:
- Device specific category reference (e.g.: CAT1) - This component, enabled by default, pulls in any device specific code for this board.
Defines:
- CYBSP_WIFI_CAPABLE - This define, disabled by default, causes the BSP to initialize the interface to an onboard wireless chip if it has one.
- CY_USING_HAL - This define, enabled by default, specifies that the HAL is intended to be used by the application. This will cause the BSP to include the applicable header file and to initialize the system level drivers.
- CYBSP_CUSTOM_SYSCLK_PM_CALLBACK - This define, disabled by default, causes the BSP to skip registering its default SysClk Power Management callback, if any, and instead to invoke the application-defined function
cybsp_register_custom_sysclk_pm_callbackto register an application-specific callback.
Clock Configuration
| Clock | Source | Output Frequency |
|---|---|---|
| FLL | IMO | 100.0 MHz |
| PLL | IMO | 48.0 MHz |
| CLK_HF0 | CLK_PATH0 | 100 MHz |
Power Configuration
- System Active Power Mode: LP
- System Idle Power Mode: Deep Sleep
- VDDA Voltage: 3300 mV
- VDDD Voltage: 3300 mV
See the BSP Setttings for additional board specific configuration settings.
API Reference Manual
The CY8CPROTO-062S3-4343W Board Support Package provides a set of APIs to configure, initialize and use the board resources.
See the BSP API Reference Manual for the complete list of the provided interfaces.
More information
- CY8CPROTO-062S3-4343W BSP API Reference Manual
- CY8CPROTO-062S3-4343W Documentation
- Cypress Semiconductor, an Infineon Technologies Company
- Infineon GitHub
- ModusToolbox™
© Cypress Semiconductor Corporation (an Infineon company) or an affiliate of Cypress Semiconductor Corporation, 2019-2022.