840 lines
22 KiB
C
840 lines
22 KiB
C
/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2022, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2013-05-13 aozima update for kehong-lingtai.
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* 2015-01-31 armink make sure the serial transmit complete in putc()
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* 2016-05-13 armink add DMA Rx mode
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* 2017-01-19 aubr.cool add interrupt Tx mode
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* 2017-04-13 aubr.cool correct Rx parity err
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* 2021-08-20 breo.com first version
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* 2022-06-01 THEWON first version for serialX
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*/
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#include <rtdevice.h>
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#include <rthw.h>
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#include <board.h>
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#include "drv_usartX.h"
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#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
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#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
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#ifdef RT_SERIAL_USING_DMA
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static void DMA_RX_Configuration(struct rt_serial_device *serial);
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static void DMA_TX_Configuration(struct rt_serial_device *serial);
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#endif
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static rt_err_t n32_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct n32_uart *uart;
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USART_InitType USART_InitStructure;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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USART_InitStructure.BaudRate = cfg->baud_rate;
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switch (cfg->data_bits)
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{
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case DATA_BITS_8 :
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USART_InitStructure.WordLength = USART_WL_8B;
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break;
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case DATA_BITS_9 :
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USART_InitStructure.WordLength = USART_WL_9B;
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break;
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default:
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USART_InitStructure.WordLength = USART_WL_8B;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1 :
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USART_InitStructure.StopBits = USART_STPB_1;
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break;
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case STOP_BITS_2 :
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USART_InitStructure.StopBits = USART_STPB_2;
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break;
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default:
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USART_InitStructure.StopBits = USART_STPB_1;
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break;
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}
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switch (cfg->parity)
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case PARITY_NONE :
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USART_InitStructure.Parity = USART_PE_NO;
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break;
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case PARITY_ODD :
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USART_InitStructure.Parity = USART_PE_ODD;
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break;
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case PARITY_EVEN :
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USART_InitStructure.Parity = USART_PE_EVEN;
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break;
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default:
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USART_InitStructure.Parity = USART_PE_NO;
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break;
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}
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
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USART_InitStructure.Mode = USART_MODE_RX | USART_MODE_TX;
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USART_Init(uart->uart_device, &USART_InitStructure);
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return RT_EOK;
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}
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static rt_err_t n32_uart_init(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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USART_InitType USART_InitStructure;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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n32_msp_usart_init(uart->uart_device);
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if (n32_uart_configure(serial, &serial->config) != RT_EOK)
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{
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return -RT_ERROR;
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}
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/* Enable USART */
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USART_Enable(uart->uart_device, ENABLE);
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USART_ClrFlag(uart->uart_device, USART_FLAG_TXDE|USART_FLAG_TXC);
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return RT_EOK;
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}
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static rt_err_t n32_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct n32_uart *uart;
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rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
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NVIC_InitType NVIC_InitStructure;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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switch (cmd) {
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case RT_DEVICE_CTRL_OPEN:
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USART_ConfigInt(uart->uart_device, USART_INT_TXDE, DISABLE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_RXDNE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXDE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXC);
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/* enable rx irq */
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UART_ENABLE_IRQ(uart->irq);
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#ifdef RT_SERIAL_USING_DMA
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uart->dmaTxing = RT_FALSE;
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#endif
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break;
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case RT_DEVICE_CTRL_CLOSE:
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/* disable rx irq */
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UART_DISABLE_IRQ(uart->irq);
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USART_ConfigInt(uart->uart_device, USART_INT_RXDNE, DISABLE);
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USART_ConfigInt(uart->uart_device, USART_INT_TXDE, DISABLE);
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USART_ConfigInt(uart->uart_device, USART_INT_TXC, DISABLE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_RXDNE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXDE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXC);
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#ifdef RT_SERIAL_USING_DMA
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_rx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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DMA_EnableChannel(uart->dma_rx.dma_ch, DISABLE);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_HTX, DISABLE);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_TXC, DISABLE);
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DMA_DeInit(uart->dma_rx.dma_ch);
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_tx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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DMA_EnableChannel(uart->dma_tx.dma_ch, DISABLE);
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DMA_ConfigInt(uart->dma_tx.dma_ch, DMA_INT_TXC, DISABLE);
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DMA_DeInit(uart->dma_tx.dma_ch);
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#endif
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break;
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable interrupt */
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if (ctrl_arg & RT_DEVICE_FLAG_INT_RX) {
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USART_ConfigInt(uart->uart_device, USART_INT_RXDNE, DISABLE);
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}
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#ifdef RT_SERIAL_USING_DMA
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/* disable DMA */
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if (ctrl_arg & RT_DEVICE_FLAG_DMA_RX) {
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_rx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_HTX, DISABLE);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_TXC, DISABLE);
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}
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if(ctrl_arg & RT_DEVICE_FLAG_DMA_TX) {
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_tx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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DMA_ConfigInt(uart->dma_tx.dma_ch, DMA_INT_TXC, DISABLE);
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}
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#endif
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable interrupt */
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if (ctrl_arg & RT_DEVICE_FLAG_INT_RX) {
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USART_ConfigInt(uart->uart_device, USART_INT_RXDNE, ENABLE);
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}
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break;
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/* USART config */
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case RT_DEVICE_CTRL_CONFIG :
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#ifdef RT_SERIAL_USING_DMA
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if (ctrl_arg & RT_DEVICE_FLAG_DMA_RX) {
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DMA_RX_Configuration(serial);
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} else if (ctrl_arg & RT_DEVICE_FLAG_DMA_TX) {
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DMA_TX_Configuration(serial);
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}
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#endif
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break;
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default :
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break;
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}
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return RT_EOK;
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}
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static int n32_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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while (!(uart->uart_device->STS & USART_FLAG_TXDE));
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uart->uart_device->DAT = c;
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return 1;
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}
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static int n32_uart_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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ch = -1;
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if (uart->uart_device->STS & USART_FLAG_RXDNE)
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{
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ch = uart->uart_device->DAT & 0xff;
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}
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return ch;
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}
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static int n32_uart_flush(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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while(!((uart->uart_device->STS & USART_FLAG_TXDE) && (uart->uart_device->STS & USART_FLAG_TXC)));
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return 0;
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}
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static void n32_start_tx(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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USART_ConfigInt(uart->uart_device, USART_INT_TXDE, ENABLE);
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}
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static void n32_stop_tx(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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USART_ConfigInt(uart->uart_device, USART_INT_TXDE, DISABLE);
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}
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#ifdef RT_SERIAL_USING_DMA
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static rt_bool_t n32_is_dma_txing(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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// return uart->dmaTxing; //RT_FALSE;
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return (DMA_GetFlagStatus(uart->dma_tx.dma_flag, uart->dma_tx.dma_module) == SET);
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}
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static void n32_start_dma_tx(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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// TODO: 启用 DMA 发送
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uart->dma_tx.dma_ch->MADDR = (uint32_t)(buf);
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uart->dma_tx.dma_ch->TXNUM = (uint32_t)(size);
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DMA_EnableChannel(uart->dma_tx.dma_ch, ENABLE);
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uart->dmaTxing = RT_TRUE;
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}
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static void n32_stop_dma_tx(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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// TODO: 禁用 DMA 发送
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DMA_EnableChannel(uart->dma_tx.dma_ch, DISABLE);
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uart->dmaTxing = RT_FALSE;
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}
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#endif
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static void n32_enable_interrupt(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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UART_ENABLE_IRQ(uart->irq);
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}
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static void n32_disable_interrupt(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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UART_DISABLE_IRQ(uart->irq);
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}
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#ifdef RT_SERIAL_USING_DMA
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/**
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* DMA receive done process. This need add to DMA receive done ISR.
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*
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* @param serial serial device
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*/
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static void dma_rx_done_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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rt_size_t dma_cnt;
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uart = rt_container_of(serial, struct n32_uart, serial);
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dma_cnt = RT_SERIAL_DMA_BUFSZ - DMA_GetCurrDataCounter(uart->dma_rx.dma_ch);
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (dma_cnt << 8));
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DMA_ClearFlag(uart->dma_rx.dma_flag, uart->dma_rx.dma_module);
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DMA_ClrIntPendingBit(uart->dma_rx.dma_flag, uart->dma_rx.dma_module);
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}
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/**
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* DMA transmit done process. This need add to DMA transmit done ISR.
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*
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* @param serial serial device
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*/
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static void dma_tx_done_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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rt_size_t dma_cnt;
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uart = rt_container_of(serial, struct n32_uart, serial);
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dma_cnt = DMA_GetCurrDataCounter(uart->dma_tx.dma_ch);
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if (dma_cnt == 0)
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{
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rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
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}
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DMA_ClrIntPendingBit(uart->dma_tx.dma_flag, uart->dma_rx.dma_module);
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}
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#endif
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart;
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#ifdef RT_SERIAL_USING_DMA
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rt_size_t dma_cnt;
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#endif
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RT_ASSERT(uart != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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if(USART_GetIntStatus(uart->uart_device, USART_INT_RXDNE) != RESET)
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{
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if(USART_GetFlagStatus(uart->uart_device, USART_FLAG_PEF) == RESET)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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/* clear interrupt */
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_RXDNE);
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}
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if(USART_GetIntStatus(uart->uart_device, USART_INT_TXDE) != RESET)
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{
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if(USART_GetFlagStatus(uart->uart_device, USART_FLAG_PEF) == RESET)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
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}
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/* clear interrupt */
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXDE);
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}
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#ifdef RT_SERIAL_USING_DMA
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if(USART_GetIntStatus(uart->uart_device, USART_INT_IDLEF) != RESET)
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{
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/* read a data for clear receive idle interrupt flag */
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USART_ReceiveData(uart->uart_device);
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dma_cnt = RT_SERIAL_DMA_BUFSZ - DMA_GetCurrDataCounter(uart->dma_rx.dma_ch);
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (dma_cnt << 8));
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}
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#endif
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if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_OREF) == SET)
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{
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n32_uart_getc(serial);
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}
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}
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static const struct rt_uart_ops n32_uart_ops =
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{
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.configure = n32_uart_configure,
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.control = n32_uart_control,
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.putc = n32_uart_putc,
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.getc = n32_uart_getc,
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.flush = n32_uart_flush,
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.start_tx = n32_start_tx,
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.stop_tx = n32_stop_tx,
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#ifdef RT_SERIAL_USING_DMA
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.is_dma_txing = n32_is_dma_txing,
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.start_dma_tx = n32_start_dma_tx,
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.stop_dma_tx = n32_stop_dma_tx,
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#endif
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.enable_interrupt = n32_enable_interrupt,
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.disable_interrupt = n32_disable_interrupt,
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};
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#if defined(BSP_USING_UART1)
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/* UART1 device driver structure */
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struct n32_uart uart1 =
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{
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.uart_device = USART1,
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.irq = USART1_IRQn,
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#ifdef RT_SERIAL_USING_DMA
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.dmaTxing = RT_FALSE,
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.dma_rx = {
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DMA1_CH5,
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DMA1,
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DMA1_FLAG_TC5 | DMA1_FLAG_HT5,
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DMA1_Channel5_IRQn,
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},
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.dma_tx = {
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DMA1_CH4,
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DMA1,
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DMA1_FLAG_TC4,
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DMA1_Channel4_IRQn,
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},
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#endif
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};
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void USART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&uart1.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#ifdef RT_SERIAL_USING_DMA
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void DMA1_Channel5_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&uart1.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA1_Channel4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_tx_done_isr(&uart1.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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/* UART2 device driver structure */
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struct n32_uart uart2 =
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{
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.uart_device = USART2,
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.irq = USART2_IRQn,
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#ifdef RT_SERIAL_USING_DMA
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.dmaTxing = RT_FALSE,
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.dma_rx = {
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DMA1_CH6,
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DMA1,
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DMA1_FLAG_TC6 | DMA1_FLAG_HT6,
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DMA1_Channel6_IRQn,
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},
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.dma_tx = {
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DMA1_CH7,
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DMA1,
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DMA1_FLAG_TC7,
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DMA1_Channel7_IRQn,
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},
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#endif
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};
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void USART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&uart2.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#ifdef RT_SERIAL_USING_DMA
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void DMA1_Channel6_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&uart2.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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/* UART3 device driver structure */
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struct n32_uart uart3 =
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{
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.uart_device = USART3,
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.irq = USART3_IRQn,
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#ifdef RT_SERIAL_USING_DMA
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.dmaTxing = RT_FALSE,
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.dma_rx = {
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DMA1_CH3,
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DMA1,
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DMA1_FLAG_TC3 | DMA1_FLAG_HT3,
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DMA1_Channel3_IRQn,
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},
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.dma_tx = {
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DMA1_CH2,
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DMA1,
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DMA1_FLAG_TC2,
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DMA1_Channel2_IRQn,
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},
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#endif
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};
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void USART3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&uart3.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#ifdef RT_SERIAL_USING_DMA
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void DMA1_Channel3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&uart3.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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/* UART4 device driver structure */
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struct n32_uart uart4 =
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{
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.uart_device = UART4,
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.irq = UART4_IRQn,
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#ifdef RT_SERIAL_USING_DMA
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.dmaTxing = RT_FALSE,
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.dma_rx = {
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DMA2_CH3,
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DMA2,
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DMA2_FLAG_TC3 | DMA2_FLAG_HT3,
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DMA2_Channel3_IRQn,
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},
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.dma_tx = {
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DMA2_CH5,
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DMA2,
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DMA2_FLAG_TC5,
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DMA2_Channel5_IRQn,
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},
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#endif
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};
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void UART4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&uart4.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#ifdef RT_SERIAL_USING_DMA
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void DMA2_Channel3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&uart4.serial);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#endif /* BSP_USING_UART4 */
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static void NVIC_Configuration(struct n32_uart *uart)
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{
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NVIC_InitType NVIC_InitStructure;
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/* Enable the USART1 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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#ifdef RT_SERIAL_USING_DMA
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// TODO: 添加发送 DMA 配置，添加接收 DMA 配置
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static void DMA_RX_Configuration(struct rt_serial_device *serial)
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{
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DMA_InitType DMA_InitStructure;
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NVIC_InitType NVIC_InitStructure;
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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/* enable transmit idle interrupt */
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USART_ConfigInt(uart->uart_device, USART_INT_IDLEF, ENABLE);
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/* DMA clock enable */
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA1, ENABLE);
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA2, ENABLE);
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/* rx dma config */
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DMA_InitStructure.PeriphAddr = (uint32_t)&(uart->uart_device->DAT);
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DMA_InitStructure.MemAddr = (uint32_t)(serial->serial_dma_rx);
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DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
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DMA_InitStructure.BufSize = RT_SERIAL_DMA_BUFSZ;
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DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
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DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
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DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_BYTE;
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DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
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DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
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DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
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DMA_DeInit(uart->dma_rx.dma_ch);
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DMA_Init(uart->dma_rx.dma_ch, &DMA_InitStructure);
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DMA_ClearFlag(uart->dma_rx.dma_flag, uart->dma_rx.dma_module);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_HTX, ENABLE);
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DMA_ConfigInt(uart->dma_rx.dma_ch, DMA_INT_TXC, ENABLE);
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USART_EnableDMA(uart->uart_device, USART_DMAREQ_RX, ENABLE);
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DMA_EnableChannel(uart->dma_rx.dma_ch, ENABLE);
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/* rx dma interrupt config */
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_rx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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static void DMA_TX_Configuration(struct rt_serial_device *serial)
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{
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DMA_InitType DMA_InitStructure;
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NVIC_InitType NVIC_InitStructure;
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struct n32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct n32_uart, serial);
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/* enable transmit idle interrupt */
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// USART_ConfigInt(uart->uart_device, USART_INT_IDLEF, ENABLE);
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/* DMA clock enable */
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA1, ENABLE);
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA2, ENABLE);
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/* tx dma config */
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DMA_InitStructure.PeriphAddr = (uint32_t)&(uart->uart_device->DAT);
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// DMA_InitStructure.MemAddr = (uint32_t)(serial->serial_dma_tx);
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DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;
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// DMA_InitStructure.BufSize = serial->config.bufsz;
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DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
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DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
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DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_BYTE;
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DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.CircularMode = DMA_MODE_NORMAL;
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DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
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DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
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DMA_DeInit(uart->dma_tx.dma_ch);
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DMA_Init(uart->dma_tx.dma_ch, &DMA_InitStructure);
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DMA_ClearFlag(uart->dma_tx.dma_flag, uart->dma_tx.dma_module);
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DMA_ConfigInt(uart->dma_tx.dma_ch, DMA_INT_TXC, ENABLE);
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USART_EnableDMA(uart->uart_device, USART_DMAREQ_TX, ENABLE);
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// DMA_EnableChannel(uart->dma_tx.dma_ch, ENABLE);
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/* rx dma interrupt config */
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NVIC_InitStructure.NVIC_IRQChannel = uart->dma_tx.dma_irq;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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#endif
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int rt_hw_usart_init(void)
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{
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struct n32_uart *uart;
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#if defined(BSP_USING_UART1)
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uart = &uart1;
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uart->serial.ops = &n32_uart_ops;
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NVIC_Configuration(uart);
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/* register UART1 device */
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rt_hw_serial_register(&uart->serial, "uart1",
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RT_DEVICE_FLAG_RDWR |
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RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX
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#ifdef RT_SERIAL_USING_DMA
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| RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX
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#endif
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, uart);
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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uart = &uart2;
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uart->serial.ops = &n32_uart_ops;
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NVIC_Configuration(uart);
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/* register UART2 device */
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rt_hw_serial_register(&uart->serial, "uart2",
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RT_DEVICE_FLAG_RDWR |
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RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX
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#ifdef RT_SERIAL_USING_DMA
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| RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX
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#endif
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, uart);
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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uart = &uart3;
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uart->serial.ops = &n32_uart_ops;
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NVIC_Configuration(uart);
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/* register UART3 device */
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rt_hw_serial_register(&uart->serial, "uart3",
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RT_DEVICE_FLAG_RDWR |
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RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX
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#ifdef RT_SERIAL_USING_DMA
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| RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX
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#endif
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, uart);
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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uart = &uart4;
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uart->serial.ops = &n32_uart_ops;
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NVIC_Configuration(uart);
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/* register UART4 device */
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rt_hw_serial_register(&uart->serial, "uart4",
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RT_DEVICE_FLAG_RDWR |
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RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX
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#ifdef RT_SERIAL_USING_DMA
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| RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX
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#endif
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, uart);
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#endif /* BSP_USING_UART4 */
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_usart_init);
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|