149 lines
7.0 KiB
C
149 lines
7.0 KiB
C
/**************************************************************************//**
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* @file ohci.h
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* @version V1.00
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* @brief USB OHCI host controller driver header file.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* @copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef _USBH_OHCI_H_
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#define _USBH_OHCI_H_
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/// @cond HIDDEN_SYMBOLS
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struct utr_t;
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struct udev_t;
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/* OHCI CONTROL AND STATUS REGISTER MASKS */
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/*
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* Host controller functional state.
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* for HCFS(HcControl[7:6])
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*/
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#define HCFS_RESET (0UL << USBH_HcControl_HCFS_Pos)
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#define HCFS_RESUME (1UL << USBH_HcControl_HCFS_Pos)
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#define HCFS_OPER (2UL << USBH_HcControl_HCFS_Pos)
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#define HCFS_SUSPEND (3UL << USBH_HcControl_HCFS_Pos)
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/*----------------------------------------------------------------------------------------*/
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/* Endpoint descriptor */
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/*----------------------------------------------------------------------------------------*/
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typedef struct ed_t
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{
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/* OHCI spec. Endpoint descriptor */
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uint32_t Info;
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uint32_t TailP;
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uint32_t HeadP;
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uint32_t NextED;
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/* The following members are used by USB Host libary. */
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uint8_t bInterval;
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uint16_t next_sf; /* for isochronous transfer, recording the next SF */
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struct ed_t * next; /* point to the next ED in remove list */
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} ED_T;
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#define ED_CTRL_FA_Pos 0 /* Info[6:0] - Function address */
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#define ED_CTRL_EN_Pos 7 /* Info[10:7] - Endpoint number */
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#define ED_CTRL_DIR_Pos 11 /* Info[12:11] - Direction */
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#define ED_CTRL_MPS_Pos 16 /* Info[26:16] - Maximum packet size */
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#define ED_FUNC_ADDR_Msk (0x7f)
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#define ED_EP_ADDR_Msk (0xf<<7)
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#define ED_DIR_Msk (0x3<<11)
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#define ED_SPEED_Msk (1<<13)
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#define ED_MAX_PK_SIZE_Msk (0x7ff<<16)
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#define ED_DIR_BY_TD (0<<ED_CTRL_DIR_Pos)
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#define ED_DIR_OUT (1<<ED_CTRL_DIR_Pos)
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#define ED_DIR_IN (2<<ED_CTRL_DIR_Pos)
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#define ED_SPEED_FULL (0<<13) /* Info[13] - 0: is full speed device */
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#define ED_SPEED_LOW (1<<13) /* Info[13] - 1: is low speed device */
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#define ED_SKIP (1<<14) /* Info[14] - 1: HC skip this ED */
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#define ED_FORMAT_GENERAL (0<<15) /* Info[15] - 0: is a general TD */
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#define ED_FORMAT_ISO (1<<15) /* Info[15] - 1: is an isochronous TD */
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#define ED_HEADP_HALT (1<<0) /* HeadP[0] - 1: Halt; 0: Not */
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/*----------------------------------------------------------------------------------------*/
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/* Transfer descriptor */
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/*----------------------------------------------------------------------------------------*/
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/* general transfer descriptor */
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typedef struct td_t
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{
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uint32_t Info;
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uint32_t CBP; /* Current Buffer Pointer */
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uint32_t NextTD; /* Next TD */
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uint32_t BE; /* Buffer End */
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uint32_t PSW[4]; /* PSW 0~7 */
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/* The following members are used by USB Host libary. */
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uint32_t buff_start; /* Buffer Start */
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ED_T *ed; /* The ED that this TD belong to. */
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struct utr_t *utr; /* associated UTR */
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struct td_t *next; /* point to next TD of the same UTR */
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} TD_T;
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#define TD_ADDR_MASK 0xFFFFFFFC
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/* Completion codes */
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enum OCHI_CC_CODE
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{
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/* mapping of the OHCI CC status to error codes */
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CC_NOERROR, /* No Error */
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CC_CRC, /* CRC Error */
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CC_BITSTUFF, /* Bit Stuff */
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CC_DATA_TOGGLE, /* Data Toggle */
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CC_STALL, /* Stall */
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CC_NOTRESPONSE, /* DevNotResp */
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CC_PID_CHECK, /* PIDCheck */
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CC_UNEXPECTED_PID, /* UnExpPID */
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CC_DATA_OVERRUN, /* DataOver */
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CC_DATA_UNDERRUN, /* DataUnder */
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CC_RESERVED1, /* reserved */
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CC_RESERVED2, /* reserved */
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CC_BUFFER_OVERRUN, /* BufferOver */
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CC_BUFFER_UNDERRUN, /* BuffUnder */
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CC_NOT_ACCESS /* Not Access */
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};
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/* TD control field */
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#define TD_CC 0xF0000000
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#define TD_CC_GET(td) ((td >>28) & 0x0F)
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#define TD_CC_SET(td, cc) (td) = ((td) & 0x0FFFFFFF) | (((cc) & 0x0F) << 28)
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#define TD_T_DATA0 0x02000000
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#define TD_T_DATA1 0x03000000
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#define TD_R 0x00040000
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#define TD_DP 0x00180000
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#define TD_DP_IN 0x00100000
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#define TD_DP_OUT 0x00080000
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#define MAXPSW 8
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/* steel TD reserved bits to keep driver data */
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#define TD_TYPE_Msk (0x3<<16)
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#define TD_TYPE_CTRL (0x0<<16)
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#define TD_TYPE_BULK (0x1<<16)
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#define TD_TYPE_INT (0x2<<16)
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#define TD_TYPE_ISO (0x3<<16)
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#define TD_CTRL_Msk (0x7<<15)
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#define TD_CTRL_DATA (1<<15)
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/*
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* The HCCA (Host Controller Communications Area) is a 256 byte
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* structure defined in the OHCI spec. that the host controller is
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* told the base address of. It must be 256-byte aligned.
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*/
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typedef struct
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{
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uint32_t int_table[32]; /* Interrupt ED table */
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uint16_t frame_no; /* current frame number */
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uint16_t pad1; /* set to 0 on each frame_no change */
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uint32_t done_head; /* info returned for an interrupt */
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uint8_t reserved_for_hc[116];
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} HCCA_T;
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/// @endcond
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#endif /* _USBH_OHCI_H_ */
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