349 lines
12 KiB
C
349 lines
12 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fxmac.h
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* Date: 2022-04-06 14:46:52
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* LastEditTime: 2022-04-06 14:46:58
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* Description: This file is for gmac driver .Functions in this file are the minimum required functions
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* for this driver.
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 huanghe 2022/06/16 first release
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*/
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#ifndef FXMAC_H
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#define FXMAC_H
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#include "ftypes.h"
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#include "fassert.h"
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#include "ferror_code.h"
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#include "fxmac_hw.h"
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#include "fxmac_bdring.h"
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#include "fparameters.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define FXMAC_ERR_INVALID_PARAM FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x1u)
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#define FXMAC_ERR_SG_LIST FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x2u)
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#define FXMAC_ERR_GENERAL FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x4u)
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#define FXMAC_ERR_SG_NO_LIST FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x5u)
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#define FXMAC_ERR_PHY_BUSY FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x6u)
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#define FXMAC_PHY_IS_NOT_FOUND FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x7u)
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#define FXMAC_PHY_AUTO_AUTONEGOTIATION_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x8u)
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#define FXMAC_ERR_MAC_IS_PROCESSING FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 0x9u)
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/** @name Configuration options
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*
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* Device configuration options. See the FXMAC_SetOptions(),
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* FXMACClearOptions() and FXMAC_GetOptions() for information on how to
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* use options.
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*
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* The default state of the options are noted and are what the device and
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* driver will be set to after calling FXMAC_Reset() or
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* FXMAC_Initialize().
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*
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* @{
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*/
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#define FXMAC_PROMISC_OPTION 0x00000001U
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/* Accept all incoming packets.
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* This option defaults to disabled (cleared) */
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#define FXMAC_FRAME1536_OPTION 0x00000002U
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/* Frame larger than 1516 support for Tx & Rx.x
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* This option defaults to disabled (cleared) */
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#define FXMAC_VLAN_OPTION 0x00000004U
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/* VLAN Rx & Tx frame support.
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* This option defaults to disabled (cleared) */
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#define FXMAC_FLOW_CONTROL_OPTION 0x00000010U
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/* Enable recognition of flow control frames on Rx
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* This option defaults to enabled (set) */
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#define FXMAC_FCS_STRIP_OPTION 0x00000020U
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/* Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not
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* stripped.
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* This option defaults to enabled (set) */
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#define FXMAC_FCS_INSERT_OPTION 0x00000040U
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/* Generate FCS field and add PAD automatically for outgoing frames.
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* This option defaults to disabled (cleared) */
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#define FXMAC_LENTYPE_ERR_OPTION 0x00000080U
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/* Enable Length/Type error checking for incoming frames. When this option is
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* set, the MAC will filter frames that have a mismatched type/length field
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* and if FXMAC_REPORT_RXERR_OPTION is set, the user is notified when these
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* types of frames are encountered. When this option is cleared, the MAC will
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* allow these types of frames to be received.
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*
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* This option defaults to disabled (cleared) */
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#define FXMAC_TRANSMITTER_ENABLE_OPTION 0x00000100U
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/* Enable the transmitter.
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* This option defaults to enabled (set) */
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#define FXMAC_RECEIVER_ENABLE_OPTION 0x00000200U
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/* Enable the receiver
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* This option defaults to enabled (set) */
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#define FXMAC_BROADCAST_OPTION 0x00000400U
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/* Allow reception of the broadcast address
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* This option defaults to enabled (set) */
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#define FXMAC_MULTICAST_OPTION 0x00000800U
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/* Allows reception of multicast addresses programmed into hash
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* This option defaults to disabled (clear) */
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#define FXMAC_RX_CHKSUM_ENABLE_OPTION 0x00001000U
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/* Enable the RX checksum offload
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* This option defaults to enabled (set) */
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#define FXMAC_TX_CHKSUM_ENABLE_OPTION 0x00002000U
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/* Enable the TX checksum offload
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* This option defaults to enabled (set) */
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#define FXMAC_JUMBO_ENABLE_OPTION 0x00004000U
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#define FXMAC_SGMII_ENABLE_OPTION 0x00008000U
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#define FXMAC_LOOPBACK_NO_MII_OPTION 0x00010000U
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#define FXMAC_LOOPBACK_USXGMII_OPTION 0x00020000U
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#define FXMAC_GET_TXRING(instance) (instance.tx_bd_queue.bdring)
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#define FXMAC_GET_RXRING(instance) (instance.rx_bd_queue.bdring)
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#define FXMAC_DEFAULT_OPTIONS \
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((u32)FXMAC_FLOW_CONTROL_OPTION | \
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(u32)FXMAC_FCS_INSERT_OPTION | \
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(u32)FXMAC_FCS_STRIP_OPTION | \
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(u32)FXMAC_BROADCAST_OPTION | \
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(u32)FXMAC_LENTYPE_ERR_OPTION | \
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(u32)FXMAC_TRANSMITTER_ENABLE_OPTION | \
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(u32)FXMAC_RECEIVER_ENABLE_OPTION | \
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(u32)FXMAC_RX_CHKSUM_ENABLE_OPTION | \
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(u32)FXMAC_TX_CHKSUM_ENABLE_OPTION)
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typedef enum
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{
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FXMAC_LINKDOWN = 0,
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FXMAC_LINKUP = 1,
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FXMAC_NEGOTIATING = 2
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} FXmacLinkStatus;
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/* The next few constants help upper layers determine the size of memory
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* pools used for Ethernet buffers and descriptor lists.
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*/
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#define FXMAC_MAC_ADDR_SIZE 6U /* size of Ethernet header */
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#define FXMAC_MTU 1500U /* max MTU size of Ethernet frame */
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#define FXMAC_MTU_JUMBO 10240U /* max MTU size of jumbo frame */
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#define FXMAC_HDR_SIZE 14U /* size of Ethernet header , DA + SA + TYPE*/
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#define FXMAC_HDR_VLAN_SIZE 18U /* size of Ethernet header with VLAN */
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#define FXMAC_TRL_SIZE 4U /* size of Ethernet trailer (FCS) */
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#define FXMAC_MAX_FRAME_SIZE (FXMAC_MTU + FXMAC_HDR_SIZE + \
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FXMAC_TRL_SIZE)
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#define FXMAC_MAX_VLAN_FRAME_SIZE (FXMAC_MTU + FXMAC_HDR_SIZE + \
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FXMAC_HDR_VLAN_SIZE + FXMAC_TRL_SIZE)
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#define FXMAC_MAX_VLAN_FRAME_SIZE_JUMBO (FXMAC_MTU_JUMBO + FXMAC_HDR_SIZE + \
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FXMAC_HDR_VLAN_SIZE + FXMAC_TRL_SIZE)
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#define FXMAC_MAX_FRAME_SIZE_JUMBO (FXMAC_MTU_JUMBO + FXMAC_HDR_SIZE + FXMAC_TRL_SIZE)
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/** @name Callback identifiers
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*
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* These constants are used as parameters to FXMAC_SetHandler()
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* @{
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*/
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#define FXMAC_HANDLER_DMASEND 1U /* 发送中断 */
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#define FXMAC_HANDLER_DMARECV 2U /* 接收中断 */
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#define FXMAC_HANDLER_ERROR 3U /* 异常中断 */
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#define FXMAC_HANDLER_LINKCHANGE 4U /* 连接状态 */
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#define FXMAC_HANDLER_RESTART 5U /* 发送描述符队列发生异常 */
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/*@}*/
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#define FXMAC_DMA_SG_IS_STARTED 0
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#define FXMAC_DMA_SG_IS_STOPED 1
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#define FXMAC_SPEED_10 10U
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#define FXMAC_SPEED_100 100U
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#define FXMAC_SPEED_1000 1000U
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#define FXMAC_SPEED_2500 2500U
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#define FXMAC_SPEED_5000 5000U
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#define FXMAC_SPEED_10000 10000U
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#define FXMAC_SPEED_25000 25000U
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/* Capability mask bits */
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#define FXMAC_CAPS_ISR_CLEAR_ON_WRITE 0x00000001 /* irq status parameters need to be written to clear after they have been read */
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/** @name Direction identifiers
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*
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* These are used by several functions and callbacks that need
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* to specify whether an operation specifies a send or receive channel.
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* @{
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*/
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#define FXMAC_SEND 1U /* send direction */
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#define FXMAC_RECV 2U /* receive direction */
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/****************************************************************************/
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/**
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*
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* This macro triggers trasmit circuit to send data currently in TX buffer(s).
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*
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* @param instance_p is a pointer to the FXmac instance to be worked on.
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*
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* @return
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*
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* @note
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*
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* Signature: void FXmacTransmit(FXmac *instance_p)
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*
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*****************************************************************************/
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#define FXmacTransmit(instance_p) \
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FXMAC_WRITEREG32((instance_p)->config.base_address, \
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FXMAC_NWCTRL_OFFSET, \
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(FXMAC_READREG32((instance_p)->config.base_address, \
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FXMAC_NWCTRL_OFFSET) | \
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FXMAC_NWCTRL_STARTTX_MASK))
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typedef void (*FXmacIrqHandler)(void *args);
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typedef void (*FXmacErrorIrqHandler)(void *args, u32 direction, u32 error_word);
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/* Interface Mode definitions */
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typedef enum
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{
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FXMAC_PHY_INTERFACE_MODE_SGMII,
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FXMAC_PHY_INTERFACE_MODE_RMII,
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FXMAC_PHY_INTERFACE_MODE_RGMII,
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FXMAC_PHY_INTERFACE_MODE_XGMII,
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FXMAC_PHY_INTERFACE_MODE_USXGMII,
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FXMAC_PHY_INTERFACE_MODE_5GBASER ,
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FXMAC_PHY_INTERFACE_MODE_2500BASEX
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} FXmacPhyInterface;
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typedef struct
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{
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u32 instance_id; /* Id of device*/
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volatile uintptr_t base_address;
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volatile uintptr_t extral_mode_base;
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volatile uintptr_t extral_loopback_base;
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FXmacPhyInterface interface;
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u32 speed; /* FXMAC_SPEED_XXX */
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u32 duplex; /* 1 is full-duplex , 0 is half-duplex */
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u32 auto_neg; /* Enable auto-negotiation - when set active high, autonegotiation operation is enabled. */
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u32 pclk_hz;
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u32 max_queue_num; /* Number of Xmac Controller Queues */
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u32 tx_queue_id; /* 0 ~ FXMAC_QUEUE_MAX_NUM ,Index queue number */
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u32 rx_queue_id; /* 0 ~ FXMAC_QUEUE_MAX_NUM ,Index queue number */
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u32 hotplug_irq_num;
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u32 dma_brust_length; /* burst length */
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u32 network_default_config;
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u32 queue_irq_num[FXMAC_QUEUE_MAX_NUM]; /* mac0 8个 ，其他的 4个 */
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u32 caps; /* */
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} FXmacConfig;
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typedef struct
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{
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u32 queue_id;
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FXmacBdRing bdring;
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} FXmacQueue;
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typedef struct
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{
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FXmacConfig config;
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u32 is_ready; /* Device is ininitialized and ready*/
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u32 is_started;
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u32 link_status; /* indicates link status ,FXMAC_LINKUP is link up ,FXMAC_LINKDOWN is link down,FXMAC_NEGOTIATING is need to negotiating*/
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u32 options;
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u32 caps; /* Capability mask bits */
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FXmacQueue tx_bd_queue; /* Transmit Queue */
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FXmacQueue rx_bd_queue; /* Receive Queue */
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FXmacIrqHandler send_irq_handler;
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void *send_args;
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FXmacIrqHandler recv_irq_handler;
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void *recv_args;
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FXmacErrorIrqHandler error_irq_handler;
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void *error_args;
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FXmacIrqHandler link_change_handler;
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void *link_change_args;
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FXmacIrqHandler restart_handler;
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void *restart_args;
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u32 moudle_id; /* Module identification number */
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u32 max_mtu_size;
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u32 max_frame_size;
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u32 phy_address; /* phy address */
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u32 rxbuf_mask; /* 1000,100,10 */
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} FXmac;
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/* fxmac_sinit.c */
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const FXmacConfig *FXmacLookupConfig(u32 instance_id);
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/* fgmac.c */
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FError FXmacCfgInitialize(FXmac *instance_p, const FXmacConfig *config_p);
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void FXmacInitInterface(FXmac *instance_p);
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void FXmacGetMacAddress(FXmac *instance_p, u8 *address_ptr, u8 index);
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FError FXmacSetMacAddress(FXmac *instance_p, u8 *address_ptr, u8 index);
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FError FXmacSetOptions(FXmac *instance_p, u32 options, u32 queue_num);
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FError FXmacClearOptions(FXmac *instance_p, u32 options, u32 queue_num);
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boolean FXmacUsxLinkStatus(FXmac *instance_p);
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void FXmacStart(FXmac *instance_p);
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void FXmacStop(FXmac *instance_p);
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void FXmacSetQueuePtr(FXmac *instance_p, uintptr QPtr, u8 QueueNum,
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u32 direction);
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/* phy interface */
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FError FXmacPhyWrite(FXmac *instance_p, u32 phy_address,
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u32 register_num, u16 phy_data);
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FError FXmacPhyRead(FXmac *instance_p, u32 phy_address,
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u32 register_num, u16 *phydat_aptr);
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FError FXmacPhyInit(FXmac *instance_p, u32 speed, u32 duplex_mode, u32 autonegotiation_en);
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void FXmacSelectClk(FXmac *instance_p);
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FError FXmacSetHandler(FXmac *instance_p, u32 handler_type, void *func_pointer, void *call_back_ref);
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/* interrupt */
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void FXmacIntrHandler(s32 vector, void *args);
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void FXmacClearHash(FXmac *instance_p);
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/* debug */
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void FXmacDebugTxPrint(FXmac *instance_p);
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void FXmacDebugRxPrint(FXmac *instance_p);
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void FXmacDebugUsxPrint(FXmac *instance_p);
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#ifdef __cplusplus
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}
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#endif
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#endif // !
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