258 lines
9.6 KiB
C
258 lines
9.6 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fgdma.h
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 08:25:35
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* Description: This file is for gdma user api implementation
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 huanghe 2021/11/5 init commit
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* 1.1 zhugengyu 2022/5/16 modify according to tech manual.
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*/
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#ifndef FGDMA_H
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#define FGDMA_H
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#include "ftypes.h"
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#include "fassert.h"
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#include "ferror_code.h"
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#include "fkernel.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/* gdma capacity mask */
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#define FGDMA_IRQ1_MASK BIT(0) /* All Gdma channel share a single interrupt */
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#define FGDMA_IRQ2_MASK BIT(1) /* Each gdma channel owns an independent interrupt */
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#define FGDMA_TRANS_NEED_RESET_MASK BIT(2) /* Gdma needs to be reset before transmission */
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typedef enum
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{
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FGDMA_OPER_NONE_PRIORITY_POLL = -1, /* Priority = -1 表示读写请求仲裁模式为Poll */
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FGDMA_OPER_PRIORITY0 = 0, /* Priority >= 0 表示读写请求仲裁模式为Qos */
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FGDMA_OPER_PRIORITY1 = 1,
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FGDMA_OPER_PRIORITY2 = 2,
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FGDMA_OPER_PRIORITY3 = 3,
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FGDMA_OPER_PRIORITY4 = 4,
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FGDMA_OPER_PRIORITY5 = 5,
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FGDMA_OPER_PRIORITY6 = 6,
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FGDMA_OPER_PRIORITY7 = 7,
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FGDMA_OPER_PRIORITY8 = 8,
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FGDMA_OPER_PRIORITY9 = 9,
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FGDMA_OPER_PRIORITY10 = 10,
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FGDMA_OPER_PRIORITY11 = 11,
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FGDMA_OPER_PRIORITY12 = 12,
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FGDMA_OPER_PRIORITY13 = 13,
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FGDMA_OPER_PRIORITY14 = 14,
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FGDMA_OPER_PRIORITY15 = 15
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} FGdmaOperPriority; /* Qos配置，值越高，优先级越高 */
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typedef enum
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{
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FGDMA_OPER_DIRECT = 0, /* 直接操作模式 */
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FGDMA_OPER_BDL /* BDL操作模式 */
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} FGdmaOperMode; /* 支持的操作模式 */
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typedef enum
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{
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FGDMA_BURST_SIZE_1_BYTE = 0,
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FGDMA_BURST_SIZE_2_BYTE = 1,
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FGDMA_BURST_SIZE_4_BYTE = 2,
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FGDMA_BURST_SIZE_8_BYTE = 3,
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FGDMA_BURST_SIZE_16_BYTE = 4
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} FGdmaBurstSize; /* 支持的读写请求size大小 */
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#define FGDMA_GET_BURST_SIZE(brust_align) (1U << brust_align)
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typedef enum
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{
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FGDMA_CHAN_EVT_FIFO_EMPTY = 0, /* 通道Fifo空事件 */
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FGDMA_CHAN_EVT_FIFO_FULL, /* 通道Fifo满事件 */
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FGDMA_CHAN_EVT_BDL_END, /* BDL模式下一个BDL条目传输完成 */
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FGDMA_CHAN_EVT_TRANS_END, /* 所有传输数据完成 */
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FGDMA_CHAN_EVT_BUSY, /* 前一次传输未完成，当前还处于传输中 */
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FGDMA_CHAN_NUM_OF_EVT
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} FGdmaChanEvtType; /* 通道中断事件 */
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#define FGDMA_SUCCESS FT_SUCCESS
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#define FGDMA_ERR_NOT_INIT FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 0)
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#define FGDMA_ERR_CHAN_IN_USE FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 1)
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#define FGDMA_ERR_CHAN_NOT_INIT FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 2)
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#define FGDMA_ERR_INVALID_ADDR FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 3)
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#define FGDMA_ERR_INVALID_SIZE FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 4)
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#define FGDMA_ERR_BDL_NOT_ENOUGH FT_MAKE_ERRCODE(ErrModBsp, ErrGdma, 5)
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#define FGDMA_ADDR_ALIGMENT 128U /* 直接模式和BDL模式的地址需要按128位对齐 */
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/**************************** Type Definitions *******************************/
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typedef struct _FGdma FGdma;
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typedef struct _FGdmaChan FGdmaChan;
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typedef struct
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{
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u32 instance_id; /* GDMA控制器ID */
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u32 irq_num[FGDMA_NUM_OF_CHAN]; /* GDMA控制器中断号 */
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u32 irq_prority; /* GDMA控制器中断优先级 */
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volatile uintptr_t base_addr; /* GDMA控制器基地址 */
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FGdmaOperPriority rd_qos; /* 读操作优先级 */
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FGdmaOperPriority wr_qos; /* 写操作优先级 */
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u32 caps; /* driver capacity */
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} FGdmaConfig; /* GDMA控制器配置 */
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typedef struct
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{
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u32 src_addr_l; /* 0x0, 数据源地址低32位 */
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u32 src_addr_h; /* 0x4, 数据源地址高32位 */
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u32 dst_addr_l; /* 0x8, 数据目的地址低32位 */
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u32 dst_addr_h; /* 0xc, 数据目的地址高32位 */
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#define FGDMA_SRC_TC_BDL_BURST_SET(x) SET_REG32_BITS((x), 1U, 0U)
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#define FGDMA_SRC_TC_BDL_SIZE_SET(x) SET_REG32_BITS((x), 6U, 4U)
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#define FGDMA_SRC_TC_BDL_LEN_SET(x) SET_REG32_BITS((x), 15U, 8U)
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u32 src_tc; /* 0x10, 源传输控制位 */
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#define FGDMA_DST_TC_BDL_BURST_SET(x) SET_REG32_BITS((x), 1U, 0U)
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#define FGDMA_DST_TC_BDL_SIZE_SET(x) SET_REG32_BITS((x), 6U, 4U)
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#define FGDMA_DST_TC_BDL_LEN_SET(x) SET_REG32_BITS((x), 15U, 8U)
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u32 dst_tc; /* 0x14, 目的传输控制 */
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u32 total_bytes;/* 0x18, 传输数据总量，以Byte为单位 */
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u32 ioc; /* 0x1c, 该条目传输完成中断产生控制位 */
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} __attribute__((__packed__)) FGdmaBdlDesc; /* BDL描述符 */
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FASSERT_STATIC(0x20U == sizeof(FGdmaBdlDesc));
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typedef u32 FGdmaChanIndex;
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typedef struct
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{
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FGdmaChanIndex chan_id; /* DMA通道ID */
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FGdmaOperPriority rd_qos; /* DMA通道读Qos配置 */
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FGdmaOperPriority wr_qos; /* DMA通道写Qos配置 */
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FGdmaOperMode trans_mode; /* DMA通道的操作模式，直接模式或者BDL模式 */
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/* Direct模式有效 */
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FGdmaBurstSize rd_align; /* DMA读请求的Burst对齐方式 */
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FGdmaBurstSize wr_align; /* DMA写请求的Burst对齐方式 */
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/* BDL模式有效 */
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boolean roll_back; /* 循环模式，TRUE: 当前BDL列表完成后，从第一个BDL项从新开始传输 */
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FGdmaBdlDesc *descs;
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u32 total_desc_num;
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u32 valid_desc_num;
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} FGdmaChanConfig; /* DMA通道配置 */
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typedef void (*FGdmaChanEvtHandler)(FGdmaChan *const chan, void *args);
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typedef struct _FGdmaChan
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{
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FGdmaChanConfig config; /* DMA通道配置 */
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FGdma *gdma; /* DMA控制器实例 */
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FGdmaChanEvtHandler evt_handlers[FGDMA_CHAN_NUM_OF_EVT]; /* DMA通道事件回调函数 */
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void *evt_handler_args[FGDMA_CHAN_NUM_OF_EVT]; /* DMA通道事件回调函数入参 */
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} FGdmaChan; /* GDMA通道实例 */
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typedef struct _FGdma
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{
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FGdmaConfig config; /* GDMA控制器配置 */
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u32 is_ready; /* GDMA控制器初始化是否完成 */
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FGdmaChan *chans[FGDMA_NUM_OF_CHAN]; /* GDMA通道实例，如果通道没有分配，值为NULL */
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} FGdma; /* GDMA控制器实例 */
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/* 获取默认的通道配置 */
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#define FGDMA_DEFAULT_DIRECT_CHAN_CONFIG(_chan_id)\
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(FGdmaChanConfig){ \
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.chan_id = (_chan_id),\
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.rd_align = FGDMA_BURST_SIZE_4_BYTE,\
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.wr_align = FGDMA_BURST_SIZE_4_BYTE,\
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.rd_qos = FGDMA_OPER_NONE_PRIORITY_POLL,\
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.wr_qos = FGDMA_OPER_NONE_PRIORITY_POLL,\
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.trans_mode = FGDMA_OPER_DIRECT,\
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.roll_back = FALSE\
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}
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#define FGDMA_DEFAULT_BDL_CHAN_CONFIG(_chan_id, _bdl_descs, _bdl_desc_num)\
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(FGdmaChanConfig){ \
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.chan_id = (_chan_id),\
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.rd_align = FGDMA_BURST_SIZE_4_BYTE,\
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.wr_align = FGDMA_BURST_SIZE_4_BYTE,\
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.rd_qos = FGDMA_OPER_NONE_PRIORITY_POLL,\
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.wr_qos = FGDMA_OPER_NONE_PRIORITY_POLL,\
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.trans_mode = FGDMA_OPER_BDL,\
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.roll_back = FALSE,\
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.descs = _bdl_descs,\
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.total_desc_num = _bdl_desc_num,\
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.valid_desc_num = 0U\
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}
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/************************** Function Prototypes ******************************/
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/* 获取GDMA控制器默认配置 */
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const FGdmaConfig *FGdmaLookupConfig(u32 instance_id);
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/* 初始化GDMA控制器实例 */
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FError FGdmaCfgInitialize(FGdma *const instance_p, const FGdmaConfig *config_p);
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/* 去初始化GDMA控制器实例 */
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void FGdmaDeInitialize(FGdma *const instance_p);
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/* 分配指定GDMA通道 */
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FError FGdmaAllocateChan(FGdma *const instance_p, FGdmaChan *const chan_p,
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const FGdmaChanConfig *config_p);
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/* 释放GDMA通道 */
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FError FGdmaDellocateChan(FGdmaChan *const chan_p);
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/* 直接操作模式下发起DMA传输 */
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FError FGdmaDirectTransfer(FGdmaChan *const chan_p, uintptr src_addr, uintptr dst_addr, fsize_t data_len);
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/* 设置BDL描述符的一个条目 */
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FError FGdmaAppendBDLEntry(FGdmaChan *const chan_p, uintptr src_addr, uintptr dst_addr, fsize_t data_len);
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/* BDL操作模式下发起DMA传输 */
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FError FGdmaBDLTransfer(FGdmaChan *const chan_p);
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/* 使能启动GDMA控制器 */
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FError FGdmaStart(FGdma *const instance_p);
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/* 停止GDMA控制器 */
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FError FGdmaStop(FGdma *const instance_p);
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/* GDMA中断处理函数 */
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void FGdmaIrqHandler(s32 vector, void *args);
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void FGdmaIrqHandlerPrivateChannel(s32 vector, void *args);
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/* 注册GDMA通道事件回调函数 */
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void FGdmaChanRegisterEvtHandler(FGdmaChan *const chan_p, FGdmaChanEvtType evt,
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FGdmaChanEvtHandler handler, void *handler_arg);
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/* 打印当前的GDMA寄存器值, DEBUG模式下有效 */
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void FGdmaDumpRegisterVals(uintptr base_addr, u32 max_chan);
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#ifdef __cplusplus
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}
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#endif
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#endif
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