181 lines
5.9 KiB
C
181 lines
5.9 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fadc.h
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 08:29:10
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* Description: This file is for detailed description of the device configuration and driver.
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 wangxiaodong 2022/4/15 init commit
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*/
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#ifndef FADC_H
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#define FADC_H
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#include "ftypes.h"
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#include "fdebug.h"
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#include "ferror_code.h"
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#include "fkernel.h"
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#include "fparameters.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define FADC_SUCCESS FT_SUCCESS
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#define FADC_ERR_INVAL_PARM FT_MAKE_ERRCODE(ErrModBsp, ErrBspAdc, 1)
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#define FADC_ERR_NOT_READY FT_MAKE_ERRCODE(ErrModBsp, ErrBspAdc, 2)
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#define FADC_ERR_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrBspAdc, 3)
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#define FADC_ERR_CMD_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspAdc, 4)
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#define FADC_ERR_NOT_SUPPORT FT_MAKE_ERRCODE(ErrModBsp, ErrBspAdc, 5)
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#define FADC_CTRL_PD_DISABLE 0
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#define FADC_CTRL_PD_ENABLE 1
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#define FADC_CONVERT_COMPLETE(x) (x=TRUE)
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#define FADC_CONVERT_UNCOMPLETE(x) (x=FALSE)
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#define FADC_READ_TIMEOUT (600)
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#define FADC_READ_DELAY (10)
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/* adc interrupt event type */
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typedef enum
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{
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FADC_INTR_EVENT_COVFIN = 0, /**< Handler type for convert finish interrupt */
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FADC_INTR_EVENT_DLIMIT = 1, /**< Handler type for low limit interrupt*/
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FADC_INTR_EVENT_ULIMIT = 2, /**< Handler type for high limit interrupt*/
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FADC_INTR_EVENT_ERROR = 3, /**< Handler type for error interrupt*/
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FADC_INTR_EVENT_NUM
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} FAdcIntrEventType;
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/* adc convert mode */
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typedef enum
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{
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FADC_CONTINUOUS_CONVERT = 0,/* continuous conversion*/
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FADC_SINGLE_CONVERT = 1, /* single conversion*/
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FADC_CONVERT_MODE_NUM
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} FAdcConvertMode;
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/* adc channel mode */
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typedef enum
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{
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FADC_MULTI_CHANNEL = 0, /* multi channel conversion*/
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FADC_FIXED_CHANNEL = 1, /* fixed channel conversion*/
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FADC_CHANNEL_MODE_NUM
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} FAdcChannelMode;
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/* adc base configuration */
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typedef struct
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{
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u32 instance_id;/* adc id */
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uintptr base_addr;/* adc control register base address*/
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u32 irq_num;/* adc interrupt number */
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u32 irq_prority;/* adc interrupt priority*/
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const char *instance_name;/* instance name */
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} FAdcConfig;
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typedef struct
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{
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u32 convert_interval; /* convert interval time */
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u32 clk_div; /* clock divider, must be even*/
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FAdcConvertMode convert_mode;/*!< convert mode */
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FAdcChannelMode channel_mode;/*!< channel mode */
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} FAdcConvertConfig;
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/* adc variable config */
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typedef struct
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{
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u16 high_threshold; /*!< Configures the ADC analog high threshold value.
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This parameter must be a 10-bit value. */
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u16 low_threshold; /*!< Configures the ADC analog low threshold value.
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This parameter must be a 10-bit value. */
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} FAdcThresholdConfig;
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typedef void (*FAdcIntrEventHandler)(void *param);
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typedef struct
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{
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FAdcConfig config;/* adc config */
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u32 is_ready;/* adc init ready flag */
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u16 value[FADC_CHANNEL_NUM]; /* adc value */
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boolean convert_complete[FADC_CHANNEL_NUM]; /*!< Specifies whether the conversion is complete> */
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FAdcIntrEventHandler event_handler[FADC_INTR_EVENT_NUM]; /* event handler for interrupt */
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void *event_param[FADC_INTR_EVENT_NUM]; /* parameters of event handler */
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} FAdcCtrl;
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/* get default configuration of specific adc id */
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const FAdcConfig *FAdcLookupConfig(u32 instance_id);
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/* DeInitialization function for the device instance */
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void FAdcDeInitialize(FAdcCtrl *pctrl);
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/* Initializes a specific instance such that it is ready to be used */
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FError FAdcCfgInitialize(FAdcCtrl *pctrl, const FAdcConfig *input_config_p);
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/* config adc convert parameters */
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FError FAdcConvertSet(FAdcCtrl *pctrl, FAdcConvertConfig *convert_config);
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/* Set adc channel high_threshold and low_threshold */
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FError FAdcChannelThresholdSet(FAdcCtrl *pctrl, FAdcChannel channel, FAdcThresholdConfig *threshold_config);
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/* init adc variable configuration */
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FError FAdcVariableConfig(FAdcCtrl *pctrl, FAdcConvertConfig *convert_config);
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/* enable channel interrupt */
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FError FAdcInterruptEnable(FAdcCtrl *pctrl, FAdcChannel channel, FAdcIntrEventType event_type);
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/* disable channel interrupt */
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FError FAdcInterruptDisable(FAdcCtrl *pctrl, FAdcChannel channel, FAdcIntrEventType event_type);
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void FAdcChannelEnable(FAdcCtrl *pctrl, FAdcChannel channel, boolean state);
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/* Start adc convert */
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void FAdcConvertStart(FAdcCtrl *pctrl);
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/* Stop adc convert */
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void FAdcConvertStop(FAdcCtrl *pctrl);
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/* read adc channel convert result value */
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FError FAdcReadConvertResult(FAdcCtrl *pctrl, FAdcChannel channel, u16 *val);
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/* read adc channel convert finish count */
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FError FAdcReadFinishCnt(FAdcCtrl *pctrl, FAdcChannel channel, u32 *count);
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/* read adc channel history limit value, include high limit and low limit */
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FError FAdcReadHisLimit(FAdcCtrl *pctrl, FAdcChannel channel, u16 *u_his_limit, u16 *d_his_limit);
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/* interrupt handler for the driver */
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void FAdcIntrHandler(s32 vector, void *args);
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/* register FAdc interrupt handler function */
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void FAdcRegisterInterruptHandler(FAdcCtrl *instance_p, FAdcIntrEventType event_type,
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FAdcIntrEventHandler handler, void *param);
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#ifdef __cplusplus
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}
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#endif
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#endif |