277 lines
7.3 KiB
C
277 lines
7.3 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-07-15 Emuzit first version
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*/
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#include <rthw.h>
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#include "ch56x_sys.h"
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static uint32_t hclk_freq;
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rt_inline uint8_t _slp_clk_off0_irqn_bit(uint8_t irqn)
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{
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uint8_t bitpos;
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switch (irqn)
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{
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case TMR0_IRQn: bitpos = RB_SLP_CLK_TMR0; break;
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case TMR1_IRQn: bitpos = RB_SLP_CLK_TMR1; break;
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case TMR2_IRQn: bitpos = RB_SLP_CLK_TMR2; break;
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/* special case to control PWMX clock in irqn way */
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case PWMX_OFFn: bitpos = RB_SLP_CLK_PWMX; break;
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case UART0_IRQn: bitpos = RB_SLP_CLK_UART0; break;
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case UART1_IRQn: bitpos = RB_SLP_CLK_UART1; break;
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case UART2_IRQn: bitpos = RB_SLP_CLK_UART2; break;
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case UART3_IRQn: bitpos = RB_SLP_CLK_UART3; break;
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default:
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bitpos = 0;
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}
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return bitpos;
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}
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rt_inline uint8_t _slp_clk_off1_irqn_bit(uint8_t irqn)
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{
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uint8_t bitpos;
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switch (irqn)
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{
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case SPI0_IRQn: bitpos = RB_SLP_CLK_SPI0; break;
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case SPI1_IRQn: bitpos = RB_SLP_CLK_SPI1; break;
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#if defined(SOC_CH567)
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case SDC_IRQn: bitpos = RB_SLP_CLK_SDC; break;
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case LED_IRQn: bitpos = RB_SLP_CLK_LED; break;
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case USB0_IRQn: bitpos = RB_SLP_CLK_USB0; break;
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case USB1_IRQn: bitpos = RB_SLP_CLK_USB1; break;
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case ECDC_IRQn: bitpos = RB_SLP_CLK_ECDC; break;
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#elif defined(SOC_CH568)
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case SDC_IRQn: bitpos = RB_SLP_CLK_SDC; break;
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case LED_IRQn: bitpos = RB_SLP_CLK_LED; break;
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case USB1_IRQn: bitpos = RB_SLP_CLK_USB1; break;
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case USB0_IRQn: bitpos = RB_SLP_CLK_SATA; break;
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case ECDC_IRQn: bitpos = RB_SLP_CLK_ECDC; break;
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#else
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case EMMC_IRQn: bitpos = RB_SLP_CLK_EMMC; break;
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case HSPI_IRQn: bitpos = RB_SLP_CLK_HSPI; break;
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case USBHS_IRQn: bitpos = RB_SLP_CLK_USBHS; break;
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case USBSS_IRQn: bitpos = RB_SLP_CLK_USBSS; break;
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case SerDes_IRQn: bitpos = RB_SLP_CLK_SERD; break;
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case DVP_IRQn: bitpos = RB_SLP_CLK_DVP; break;
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#endif
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default:
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bitpos = 0;
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}
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return bitpos;
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}
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#if defined(SOC_SERIES_CH569)
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rt_inline uint8_t _wake_clk_off_irqn_bit(uint8_t irqn)
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{
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uint8_t bitpos;
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switch (irqn)
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{
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case ETH_IRQn: bitpos = RB_SLP_CLK_ETH; break;
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case ECDC_IRQn: bitpos = RB_SLP_CLK_ECDC; break;
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default:
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bitpos = 0;
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}
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return bitpos;
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}
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#endif
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/**
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* @brief Turn on/off device clock for group clk_off0.
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*
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* @param bits is a bit mask to select corresponding devices.
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*
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* @param off is to turn off the clock (1) or trun on (0).
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*/
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void sys_slp_clk_off0(uint8_t bits, int off)
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{
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volatile struct sys_registers *sys = (void *)SYS_REG_BASE;
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rt_base_t level;
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uint8_t u8v;
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u8v = sys->SLP_CLK_OFF0.reg;
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if ((u8v & bits) != (off ? bits : 0))
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{
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u8v = off ? (u8v | bits) : (u8v & ~bits);
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level = rt_hw_interrupt_disable();
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sys_safe_access_enter(sys);
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sys->SLP_CLK_OFF0.reg = u8v;
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sys_safe_access_leave(sys);
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rt_hw_interrupt_enable(level);
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}
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}
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/**
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* @brief Turn on/off device clock for group clk_off1.
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*
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* @param bits is a bit mask to select corresponding devices.
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*
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* @param off is to turn off the clock (1) or trun on (0).
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*/
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void sys_slp_clk_off1(uint8_t bits, int off)
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{
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volatile struct sys_registers *sys = (void *)SYS_REG_BASE;
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rt_base_t level;
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uint8_t u8v;
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u8v = sys->SLP_CLK_OFF1.reg;
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if ((u8v & bits) != (off ? bits : 0))
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{
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u8v = off ? (u8v | bits) : (u8v & ~bits);
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level = rt_hw_interrupt_disable();
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sys_safe_access_enter(sys);
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sys->SLP_CLK_OFF1.reg = u8v;
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sys_safe_access_leave(sys);
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rt_hw_interrupt_enable(level);
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}
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}
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/**
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* @brief Turn on/off device clock, specified by its irq number.
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*
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* @param irqn is the irq number of the target device.
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* PWMX does not have irqn, use special PWMX_OFFn number.
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*
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* @param off is to turn off the clock (1) or trun on (0).
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*
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* @return Returns if irqn-device has corresponding clk off bit :
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* 0 if device not found; otherwise bit position of off0/off1.
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*/
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int sys_clk_off_by_irqn(uint8_t irqn, int off)
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{
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volatile struct sys_registers *sys = (void *)SYS_REG_BASE;
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uint8_t u8v;
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size_t offset;
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uint8_t bitpos = 0;
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if (irqn < END_OF_IRQn)
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{
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if ((bitpos = _slp_clk_off0_irqn_bit(irqn)) != 0)
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{
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offset = offsetof(struct sys_registers, SLP_CLK_OFF0);
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}
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else if ((bitpos = _slp_clk_off1_irqn_bit(irqn)) != 0)
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{
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offset = offsetof(struct sys_registers, SLP_CLK_OFF1);
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}
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#if defined(SOC_SERIES_CH569)
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else if ((bitpos = _wake_clk_off_irqn_bit(irqn)) != 0)
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{
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offset = offsetof(struct sys_registers, SLP_WAKE_CTRL);
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}
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#endif
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if (bitpos)
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{
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volatile uint8_t *cxreg = (void *)sys;
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rt_base_t level;
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u8v = cxreg[offset];
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if ((u8v & bitpos) != (off ? bitpos : 0))
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{
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u8v = off ? (u8v | bitpos) : (u8v & ~bitpos);
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level = rt_hw_interrupt_disable();
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sys_safe_access_enter(sys);
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cxreg[offset] = u8v;
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sys_safe_access_leave(sys);
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rt_hw_interrupt_enable(level);
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}
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}
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}
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return bitpos;
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}
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/**
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* @brief Setup HCLK frequency.
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*
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* @param freq is the desired hclk frequency.
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* supported : 120/96/80/60/48/40/32/30/15/10/6/3/2 MHz
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*
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* @return Returns 0 if hclk is successfully set.
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*/
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int sys_hclk_set(uint32_t freq)
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{
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volatile struct sys_registers *sys = (void *)SYS_REG_BASE;
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uint8_t plldiv;
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int clksel = -1;
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if (freq >= 30000000)
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{
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if (freq <= 120000000)
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{
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/* supported : 120/96/80/60/48/40/32/30 MHz */
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plldiv = 480000000 / freq; // 30M => 16 & 0xf => 0
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clksel = RB_CLK_SEL_PLL;
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}
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}
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else if (freq >= 2000000)
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{
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/* supported : 15/10/6/3/2 MHz */
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plldiv = 30000000 / freq;
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clksel = 0;
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}
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if (clksel >= 0)
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{
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rt_base_t level = rt_hw_interrupt_disable();
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sys_safe_access_enter(sys);
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sys->CLK_PLL_DIV.reg = clk_pll_div_wdat(plldiv);
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sys->CLK_CFG_CTRL.reg = clk_cfg_ctrl_wdat(clksel);
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sys_safe_access_leave(sys);
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rt_hw_interrupt_enable(level);
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/* save to hclk_freq for quick report */
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sys_hclk_calc();
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clksel = 0;
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}
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return clksel;
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}
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/**
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* @brief Get saved HCLK frequency.
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*
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* Valid only if HCLK is set strickly with sys_hclk_set().
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* Use sys_hclk_calc() otherwise.
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*
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* @return Returns saved HCLK frequency (Hz, 0 if not set yet).
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*/
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uint32_t sys_hclk_get(void)
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{
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return hclk_freq;
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}
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/**
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* @brief Get current HCLK frequency, calculated from hw setting.
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*
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* @return Returns current HCLK frequency (Hz).
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*/
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uint32_t sys_hclk_calc(void)
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{
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volatile struct sys_registers *sys = (void *)SYS_REG_BASE;
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uint8_t plldiv = sys->CLK_PLL_DIV.pll_div;
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if (sys->CLK_CFG_CTRL.sel_pll == CLK_SEL_PLL_USB_480M)
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{
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hclk_freq = plldiv ? 480000000 / plldiv : 30000000;
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}
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else
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{
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hclk_freq = plldiv ? 30000000 / plldiv : 2000000;
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}
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return hclk_freq;
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}
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