480 lines
12 KiB
C
480 lines
12 KiB
C
/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-11 wangyq the first version
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*/
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#include <rthw.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_gpio.h"
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#include <lib_scu.h>
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#include <lib_gpio.h>
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#ifdef RT_USING_PIN
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#define __ES8P_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_Pin_##gpio_index}
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#define __ES8P_PIN_DEFAULT {-1, GPIOA, GPIO_Pin_0}
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/* es8p GPIO driver */
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struct pin_index
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{
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int index;
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GPIO_TYPE gpio;
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GPIO_TYPE_PIN pin;
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};
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static const struct pin_index pins[] =
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{
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__ES8P_PIN_DEFAULT,
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__ES8P_PIN(1, B, 0),
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__ES8P_PIN(2, B, 1),
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__ES8P_PIN(3, B, 2),
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__ES8P_PIN(4, B, 3),
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__ES8P_PIN(5, B, 4),
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__ES8P_PIN(6, B, 5),
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__ES8P_PIN(7, B, 6),
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__ES8P_PIN(8, B, 7),
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__ES8P_PIN(9, B, 8),
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__ES8P_PIN(10, B, 9),
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__ES8P_PIN(11, B, 10),
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__ES8P_PIN(12, B, 11),
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__ES8P_PIN(13, B, 12),
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__ES8P_PIN(14, B, 13),
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__ES8P_PIN(15, A, 0),
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__ES8P_PIN(16, A, 1),
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__ES8P_PIN(17, A, 2),
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__ES8P_PIN(18, A, 3),
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__ES8P_PIN(19, A, 4),
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__ES8P_PIN(20, A, 5),
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__ES8P_PIN(21, A, 6),
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__ES8P_PIN(22, A, 7),
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__ES8P_PIN(23, A, 8),
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__ES8P_PIN(24, A, 9),
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__ES8P_PIN(25, A, 10),
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__ES8P_PIN(26, A, 11),
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__ES8P_PIN(27, A, 12),
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__ES8P_PIN(28, A, 13),
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__ES8P_PIN(29, A, 14),
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__ES8P_PIN(30, A, 15),
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__ES8P_PIN(31, A, 16),
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__ES8P_PIN_DEFAULT,
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__ES8P_PIN_DEFAULT,
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__ES8P_PIN(34, A, 17),
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__ES8P_PIN(35, A, 18),
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__ES8P_PIN_DEFAULT,
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__ES8P_PIN(37, A, 20),
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__ES8P_PIN(38, A, 21),
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__ES8P_PIN(39, A, 22),
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__ES8P_PIN(40, A, 23),
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__ES8P_PIN(41, A, 24),
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__ES8P_PIN(42, A, 25),
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__ES8P_PIN(43, A, 26),
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__ES8P_PIN(44, A, 27),
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__ES8P_PIN(45, A, 28),
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__ES8P_PIN(46, A, 29),
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__ES8P_PIN(47, A, 30),
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__ES8P_PIN(48, A, 31),
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};
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struct irq_map
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{
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PINT_TYPE pinno;
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IRQn_Type irqno;
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};
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static const struct irq_map irq_map[] =
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{
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{PINT0, PINT0_IRQn},
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{PINT1, PINT1_IRQn},
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{PINT2, PINT2_IRQn},
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{PINT3, PINT3_IRQn},
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{PINT4, PINT4_IRQn},
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{PINT5, PINT5_IRQn},
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{PINT6, PINT6_IRQn},
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{PINT7, PINT7_IRQn},
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};
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struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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};
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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const struct pin_index *get_pin(uint8_t pin)
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{
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const struct pin_index *index;
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if (pin < ITEM_NUM(pins))
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{
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index = &pins[pin];
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if (index->index == -1)
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index = RT_NULL;
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}
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else
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{
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index = RT_NULL;
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}
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return index;
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};
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void es8p_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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const struct pin_index *index;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return;
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}
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if (value == 0)
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{
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if (index->gpio == GPIOA)
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GPIOA_ResetBit(index->pin);
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else if (index->gpio == GPIOB)
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GPIOB_ResetBit(index->pin);
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}
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else
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{
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if (index->gpio == GPIOA)
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GPIOA_SetBit(index->pin);
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else if (index->gpio == GPIOB)
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GPIOB_SetBit(index->pin);
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}
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}
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int es8p_pin_read(rt_device_t dev, rt_base_t pin)
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{
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int value;
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const struct pin_index *index;
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value = PIN_LOW;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return value;
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}
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value = GPIO_ReadBit(index->gpio, index->pin);
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return value;
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}
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void es8p_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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const struct pin_index *index;
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GPIO_InitStruType gpio_initstruct;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return;
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}
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/* Configure GPIO_InitStructure */
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gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
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gpio_initstruct.GPIO_Func = GPIO_Func_0;
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gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
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gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
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gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
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gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
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if (mode == PIN_MODE_OUTPUT)
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{
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/* output setting */
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gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
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}
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else if (mode == PIN_MODE_INPUT)
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{
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/* input setting: not pull. */
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gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
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}
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else if (mode == PIN_MODE_INPUT_PULLUP)
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{
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/* input setting: pull up. */
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gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
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gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
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}
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else if (mode == PIN_MODE_INPUT_PULLDOWN)
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{
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/* input setting: pull down. */
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gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
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gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
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}
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else if (mode == PIN_MODE_OUTPUT_OD)
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{
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/* output setting: od. */
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gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
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gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Enable;
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}
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GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
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}
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rt_inline const struct irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
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{
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rt_int32_t mapindex = gpio_pin & 0x00FF;
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if (mapindex < 0 || mapindex >= 32)
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{
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return RT_NULL;
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}
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return &irq_map[mapindex % 8];
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};
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rt_err_t es8p_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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const struct pin_index *index;
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rt_base_t level;
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rt_int32_t irqindex;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return RT_ENOSYS;
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}
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irqindex = index->pin % 8;
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == pin &&
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pin_irq_hdr_tab[irqindex].hdr == hdr &&
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pin_irq_hdr_tab[irqindex].mode == mode &&
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pin_irq_hdr_tab[irqindex].args == args)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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if (pin_irq_hdr_tab[irqindex].pin != -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EBUSY;
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}
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pin_irq_hdr_tab[irqindex].pin = pin;
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pin_irq_hdr_tab[irqindex].hdr = hdr;
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pin_irq_hdr_tab[irqindex].mode = mode;
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pin_irq_hdr_tab[irqindex].args = args;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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rt_err_t es8p_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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{
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const struct pin_index *index;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return RT_ENOSYS;
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}
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irqindex = index->pin % 8;
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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pin_irq_hdr_tab[irqindex].pin = -1;
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pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
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pin_irq_hdr_tab[irqindex].mode = 0;
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pin_irq_hdr_tab[irqindex].args = RT_NULL;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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rt_err_t es8p_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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const struct pin_index *index;
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const struct irq_map *irqmap;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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/* Configure GPIO_InitStructure */
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GPIO_InitStruType gpio_initstruct;
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index = get_pin(pin);
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if (index == RT_NULL)
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{
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return RT_ENOSYS;
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}
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if (enabled == PIN_IRQ_ENABLE)
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{
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irqindex = pin % 8;
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_ENOSYS;
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}
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irqmap = &irq_map[irqindex];
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/* Configure GPIO_InitStructure */
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gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
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gpio_initstruct.GPIO_Func = GPIO_Func_0;
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gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
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gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
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gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
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switch (pin_irq_hdr_tab[irqindex].mode)
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{
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case PIN_IRQ_MODE_RISING:
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gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
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gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
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if (index->gpio == GPIOA)
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Rise);
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else
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Rise);
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break;
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case PIN_IRQ_MODE_FALLING:
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gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
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gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
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if (index->gpio == GPIOA)
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Fall);
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else
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Fall);
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break;
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case PIN_IRQ_MODE_RISING_FALLING:
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gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
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gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
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if (index->gpio == GPIOA)
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Change);
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else
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PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Change);
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break;
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default:
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break;
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}
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GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
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NVIC_EnableIRQ(irqmap->irqno);
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rt_hw_interrupt_enable(level);
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}
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else if (enabled == PIN_IRQ_DISABLE)
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{
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irqmap = get_pin_irq_map(index->pin);
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if (irqmap == RT_NULL)
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{
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return RT_ENOSYS;
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}
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NVIC_DisableIRQ(irqmap->irqno);
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}
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else
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{
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return RT_ENOSYS;
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops _es8p_pin_ops =
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{
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es8p_pin_mode,
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es8p_pin_write,
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es8p_pin_read,
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es8p_pin_attach_irq,
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es8p_pin_detach_irq,
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es8p_pin_irq_enable,
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RT_NULL,
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};
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int rt_hw_pin_init(void)
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{
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int result;
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SCU_GPIOCLK_Enable();
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result = rt_device_pin_register("pin", &_es8p_pin_ops, RT_NULL);
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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rt_inline void pin_irq_hdr(PINT_TYPE_IT GPIO_Pin)
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{
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uint16_t irqno;
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/* pin no. convert to dec no. */
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for (irqno = 0; irqno < 16; irqno++)
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{
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if ((0x01 << irqno) == GPIO_Pin)
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{
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break;
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}
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}
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if (pin_irq_hdr_tab[irqno].hdr)
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{
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pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
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}
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}
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rt_inline void GPIO_EXTI_Callback(PINT_TYPE_IT GPIO_Pin)
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{
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if (PINT_GetIFStatus(GPIO_Pin) != RESET)
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{
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PINT_ClearITPendingBit(GPIO_Pin);
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pin_irq_hdr(GPIO_Pin);
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}
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}
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void PINT0_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT0);
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rt_interrupt_leave();
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}
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void PINT1_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT1);
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rt_interrupt_leave();
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}
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void PINT2_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT2);
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rt_interrupt_leave();
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}
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void PINT3_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT3);
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rt_interrupt_leave();
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}
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void PINT4_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT4);
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rt_interrupt_leave();
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}
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void PINT5_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT5);
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rt_interrupt_leave();
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}
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void PINT6_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT6);
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rt_interrupt_leave();
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}
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void PINT7_IRQHandler(void)
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{
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rt_interrupt_enter();
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GPIO_EXTI_Callback(PINT_IT_PINT7);
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rt_interrupt_leave();
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}
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#endif
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