268 lines
8.7 KiB
C
268 lines
8.7 KiB
C
/**************************************************************************//**
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* @file i2s.c
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* @brief I2S driver source file
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*
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* SPDX-License-Identifier: Apache-2.0
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include <stdio.h>
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#include "NuMicro.h"
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup I2S_Driver I2S Driver
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@{
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*/
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/** @addtogroup I2S_EXPORTED_FUNCTIONS I2S Exported Functions
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@{
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*/
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static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s);
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/**
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* @brief This function make I2S module be ready to transfer.
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* @param[in] i2s The pointer of the specified I2S module.
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* @return Source clock frequency of I2S peripheral.
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* @details
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* 0: APLL
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* 1: SYSCLK1_DIV2
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*/
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static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
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{
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uint32_t u32Freq = 0UL, u32ClkSrcSel;
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uint32_t u32ClkSelMsk = 0U;
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if (i2s == I2S0)
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{
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u32ClkSelMsk = CLK_CLKSEL4_I2S0SEL_Msk;
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}
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else if (i2s == I2S1)
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{
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u32ClkSelMsk = CLK_CLKSEL4_I2S1SEL_Msk;
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}
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else
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{
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return 0U;
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}
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/* get I2S selection clock source */
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u32ClkSrcSel = CLK->CLKSEL4 & u32ClkSelMsk;
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switch (u32ClkSrcSel)
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{
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case CLK_CLKSEL4_I2S0SEL_APLL:
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u32Freq = CLK_GetPLLClockFreq(APLL);
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break;
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case CLK_CLKSEL4_I2S0SEL_SYSCLK1_DIV2:
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u32Freq = CLK_GetSYSCLK1Freq() / 2;
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break;
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default:
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u32Freq = CLK_GetPLLClockFreq(APLL);
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break;
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}
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return u32Freq;
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}
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/**
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* @brief This function configures some parameters of I2S interface for general purpose use.
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* The sample rate may not be used from the parameter, it depends on system's clock settings,
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* but real sample rate used by system will be returned for reference.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32MasterSlave I2S operation mode. Valid values are:
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* - \ref I2S_MODE_MASTER
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* - \ref I2S_MODE_SLAVE
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* @param[in] u32SampleRate Sample rate
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* @param[in] u32WordWidth Data length. Valid values are:
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* - \ref I2S_DATABIT_8
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* - \ref I2S_DATABIT_16
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* - \ref I2S_DATABIT_24
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* - \ref I2S_DATABIT_32
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* @param[in] u32MonoData: Set audio data to mono or not. Valid values are:
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* - \ref I2S_ENABLE_MONO
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* - \ref I2S_DISABLE_MONO
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* @param[in] u32DataFormat: Data format. This is also used to select I2S or PCM(TDM) function. Valid values are:
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* - \ref I2S_FORMAT_I2S
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* - \ref I2S_FORMAT_I2S_MSB
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* - \ref I2S_FORMAT_I2S_LSB
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* - \ref I2S_FORMAT_PCM
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* - \ref I2S_FORMAT_PCM_MSB
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* - \ref I2S_FORMAT_PCM_LSB
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* @return Real sample rate.
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*/
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uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32MonoData, uint32_t u32DataFormat)
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{
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uint16_t u16Divider;
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uint32_t u32BitRate, u32SrcClk;
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/* Reset I2S */
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if (i2s == I2S0)
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{
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SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
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SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
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}
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else
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{
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SYS->IPRST3 |= SYS_IPRST3_I2S1RST_Msk;
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SYS->IPRST3 &= ~SYS_IPRST3_I2S1RST_Msk;
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}
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i2s->CTL0 = u32MasterSlave | u32WordWidth | u32MonoData | u32DataFormat;
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i2s->CTL1 = I2S_FIFO_TX_LEVEL_WORD_8 | I2S_FIFO_RX_LEVEL_WORD_8;
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u32SrcClk = I2S_GetSourceClockFreq(i2s);
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u32BitRate = u32SampleRate * (((u32WordWidth >> 4U) & 0x3U) + 1U) * 16U;
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//u16Divider = (uint16_t)((u32SrcClk/u32BitRate) >> 1U) - 1U;
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u16Divider = (uint16_t)((((u32SrcClk * 10UL / u32BitRate) >> 1U) + 5UL) / 10UL) - 1U;
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i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | ((uint32_t)u16Divider << 8U);
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/* calculate real sample rate */
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u32BitRate = u32SrcClk / (2U * ((uint32_t)u16Divider + 1U));
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u32SampleRate = u32BitRate / ((((u32WordWidth >> 4U) & 0x3U) + 1U) * 16U);
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i2s->CTL0 |= I2S_CTL0_I2SEN_Msk;
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return u32SampleRate;
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}
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/**
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* @brief Disable I2S function and I2S clock.
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* @param[in] i2s is the base address of I2S module.
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* @return none
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*/
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void I2S_Close(I2S_T *i2s)
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{
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i2s->CTL0 &= ~I2S_CTL0_I2SEN_Msk;
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}
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/**
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* @brief This function enables the interrupt according to the mask parameter.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32Mask is the combination of all related interrupt enable bits.
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* Each bit corresponds to a interrupt bit.
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* @return none
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*/
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void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
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{
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i2s->IEN |= u32Mask;
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}
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/**
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* @brief This function disables the interrupt according to the mask parameter.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32Mask is the combination of all related interrupt enable bits.
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* Each bit corresponds to a interrupt bit.
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* @return none
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*/
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void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
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{
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i2s->IEN &= ~u32Mask;
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}
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/**
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* @brief Enable MCLK .
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32BusClock is the target MCLK clock
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* @return Actual MCLK clock
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*/
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uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
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{
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uint8_t u8Divider;
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uint32_t u32SrcClk, u32Reg, u32Clock;
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u32SrcClk = I2S_GetSourceClockFreq(i2s);
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if (u32BusClock == u32SrcClk)
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{
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u8Divider = 0U;
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}
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else
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{
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u8Divider = (uint8_t)(u32SrcClk / u32BusClock) >> 1U;
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}
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i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
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i2s->CTL0 |= I2S_CTL0_MCLKEN_Msk;
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u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
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if (u32Reg == 0U)
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{
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u32Clock = u32SrcClk;
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}
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else
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{
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u32Clock = ((u32SrcClk >> 1U) / u32Reg);
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}
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return u32Clock;
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}
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/**
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* @brief Disable MCLK .
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* @param[in] i2s is the base address of I2S module.
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* @return none
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*/
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void I2S_DisableMCLK(I2S_T *i2s)
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{
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i2s->CTL0 &= ~I2S_CTL0_MCLKEN_Msk;
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}
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/**
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* @brief Configure FIFO threshold setting.
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* @param[in] i2s The pointer of the specified I2S module.
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* @param[in] u32TxThreshold Decides the TX FIFO threshold. It could be 0 ~ 7.
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* @param[in] u32RxThreshold Decides the RX FIFO threshold. It could be 0 ~ 7.
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* @return None
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* @details Set TX FIFO threshold and RX FIFO threshold configurations.
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*/
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void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
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{
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i2s->CTL1 = ((i2s->CTL1 & ~(I2S_CTL1_TXTH_Msk | I2S_CTL1_RXTH_Msk)) |
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(u32TxThreshold << I2S_CTL1_TXTH_Pos) |
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(u32RxThreshold << I2S_CTL1_RXTH_Pos));
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}
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/**
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* @brief Configure PCM(TDM) function parameters, such as channel width, channel number and sync pulse width
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* @param[in] i2s The pointer of the specified I2S module.
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* @param[in] u32ChannelWidth Channel width. Valid values are:
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* - \ref I2S_TDM_WIDTH_8BIT
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* - \ref I2S_TDM_WIDTH_16BIT
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* - \ref I2S_TDM_WIDTH_24BIT
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* - \ref I2S_TDM_WIDTH_32BIT
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* @param[in] u32ChannelNum Channel number. Valid values are:
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* - \ref I2S_TDM_2CH
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* - \ref I2S_TDM_4CH
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* - \ref I2S_TDM_6CH
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* - \ref I2S_TDM_8CH
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* @param[in] u32SyncWidth Width for sync pulse. Valid values are:
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* - \ref I2S_TDM_SYNC_ONE_BCLK
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* - \ref I2S_TDM_SYNC_ONE_CHANNEL
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* @return None
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* @details Set TX FIFO threshold and RX FIFO threshold configurations.
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*/
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void I2S_ConfigureTDM(I2S_T *i2s, uint32_t u32ChannelWidth, uint32_t u32ChannelNum, uint32_t u32SyncWidth)
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{
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i2s->CTL0 = ((i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) |
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(u32ChannelWidth << I2S_CTL0_CHWIDTH_Pos) |
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(u32ChannelNum << I2S_CTL0_TDMCHNUM_Pos) |
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(u32SyncWidth << I2S_CTL0_PCMSYNC_Pos));
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}
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/*@}*/ /* end of group I2S_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group I2S_Driver */
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/*@}*/ /* end of group Standard_Driver */
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