a8828eee89
1. Add IAR project template and link scripts. Add missing CXX configuration for IAR tool chain in rtconfg.py. 2. Modify all link scripts, Using ITCM interface.(Changing flash start address from 0x0800_0000 to 0x0020_0000).
34 lines
1.4 KiB
Plaintext
34 lines
1.4 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00200000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00200000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x002FFFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x400;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite, block CSTACK, block HEAP };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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