311 lines
10 KiB
C
311 lines
10 KiB
C
/*
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* @brief LCD controller Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __LCD_001_H_
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#define __LCD_001_H_
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup IP_LCD_001 IP: LCD register block and driver
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* @ingroup IP_Drivers
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* @{
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*/
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/**
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* @brief LCD Controller register block structure
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*/
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typedef struct { /*!< LCD Structure */
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__IO uint32_t TIMH; /*!< Horizontal Timing Control register */
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__IO uint32_t TIMV; /*!< Vertical Timing Control register */
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__IO uint32_t POL; /*!< Clock and Signal Polarity Control register */
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__IO uint32_t LE; /*!< Line End Control register */
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__IO uint32_t UPBASE; /*!< Upper Panel Frame Base Address register */
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__IO uint32_t LPBASE; /*!< Lower Panel Frame Base Address register */
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__IO uint32_t CTRL; /*!< LCD Control register */
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__IO uint32_t INTMSK; /*!< Interrupt Mask register */
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__I uint32_t INTRAW; /*!< Raw Interrupt Status register */
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__I uint32_t INTSTAT; /*!< Masked Interrupt Status register */
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__O uint32_t INTCLR; /*!< Interrupt Clear register */
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__I uint32_t UPCURR; /*!< Upper Panel Current Address Value register */
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__I uint32_t LPCURR; /*!< Lower Panel Current Address Value register */
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__I uint32_t RESERVED0[115];
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__IO uint16_t PAL[256]; /*!< 256x16-bit Color Palette registers */
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__I uint32_t RESERVED1[256];
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__IO uint32_t CRSR_IMG[256];/*!< Cursor Image registers */
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__IO uint32_t CRSR_CTRL; /*!< Cursor Control register */
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__IO uint32_t CRSR_CFG; /*!< Cursor Configuration register */
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__IO uint32_t CRSR_PAL0; /*!< Cursor Palette register 0 */
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__IO uint32_t CRSR_PAL1; /*!< Cursor Palette register 1 */
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__IO uint32_t CRSR_XY; /*!< Cursor XY Position register */
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__IO uint32_t CRSR_CLIP; /*!< Cursor Clip Position register */
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__I uint32_t RESERVED2[2];
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__IO uint32_t CRSR_INTMSK; /*!< Cursor Interrupt Mask register */
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__O uint32_t CRSR_INTCLR; /*!< Cursor Interrupt Clear register */
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__I uint32_t CRSR_INTRAW; /*!< Cursor Raw Interrupt Status register */
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__I uint32_t CRSR_INTSTAT;/*!< Cursor Masked Interrupt Status register */
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} IP_LCD_001_Type;
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/**
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* @brief LCD Palette entry format
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*/
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typedef struct {
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uint32_t Rl : 5;
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uint32_t Gl : 5;
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uint32_t Bl : 5;
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uint32_t Il : 1;
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uint32_t Ru : 5;
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uint32_t Gu : 5;
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uint32_t Bu : 5;
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uint32_t Iu : 1;
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} LCD_PALETTE_ENTRY_Type;
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/**
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* @brief LCD Panel type
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*/
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typedef enum {
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LCD_TFT = 0x02, /*!< standard TFT */
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LCD_MONO_4 = 0x01, /*!< 4-bit STN mono */
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LCD_MONO_8 = 0x05, /*!< 8-bit STN mono */
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LCD_CSTN = 0x00 /*!< color STN */
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} LCD_PANEL_OPT;
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/**
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* @brief LCD Color Format
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*/
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typedef enum {
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LCD_COLOR_FORMAT_RGB = 0,
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LCD_COLOR_FORMAT_BGR
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} LCD_COLOR_FORMAT_OPT;
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/** LCD Interrupt control mask register bits */
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#define LCD_INTMSK_FUFIM 0x2 /*!< FIFO underflow interrupt enable */
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#define LCD_INTMSK_LNBUIM 0x4 /*!< LCD next base address update interrupt enable */
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#define LCD_INTMSK_VCOMPIM 0x8 /*!< Vertical compare interrupt enable */
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#define LCD_INTMSK_BERIM 0x10 /*!< AHB master error interrupt enable */
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#define CLCDC_LCDCTRL_ENABLE _BIT(0) /*!< LCD control enable bit */
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#define CLCDC_LCDCTRL_PWR _BIT(11) /*!< LCD control power enable bit */
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/**
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* @brief A structure for LCD Configuration
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*/
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typedef struct {
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uint8_t HBP; /*!< Horizontal back porch in clocks */
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uint8_t HFP; /*!< Horizontal front porch in clocks */
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uint8_t HSW; /*!< HSYNC pulse width in clocks */
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uint16_t PPL; /*!< Pixels per line */
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uint8_t VBP; /*!< Vertical back porch in clocks */
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uint8_t VFP; /*!< Vertical front porch in clocks */
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uint8_t VSW; /*!< VSYNC pulse width in clocks */
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uint16_t LPP; /*!< Lines per panel */
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uint8_t IOE; /*!< Invert output enable, 1 = invert */
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uint8_t IPC; /*!< Invert panel clock, 1 = invert */
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uint8_t IHS; /*!< Invert HSYNC, 1 = invert */
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uint8_t IVS; /*!< Invert VSYNC, 1 = invert */
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uint8_t ACB; /*!< AC bias frequency in clocks (not used) */
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uint8_t BPP; /*!< Maximum bits per pixel the display supports */
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LCD_PANEL_OPT LCD; /*!< LCD panel type */
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LCD_COLOR_FORMAT_OPT color_format; /*!<BGR or RGB */
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uint8_t Dual; /*!< Dual panel, 1 = dual panel display */
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} LCD_Config_Type;
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/**
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* @brief LCD Cursor Size
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*/
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typedef enum {
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LCD_CURSOR_32x32 = 0,
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LCD_CURSOR_64x64
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} LCD_CURSOR_SIZE_OPT;
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/**
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* @brief Enable Controller Interrupt
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param ints : OR'ed interrupt bits to enable
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* @return None
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*/
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STATIC INLINE void IP_LCD_EnableInts(IP_LCD_001_Type *LCDx, uint32_t ints)
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{
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LCDx->INTMSK = ints;
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}
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/**
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* @brief Disable Controller Interrupt
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param ints : OR'ed interrupt bits to disable
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* @return None
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*/
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STATIC INLINE void IP_LCD_DisableInts(IP_LCD_001_Type *LCDx, uint32_t ints)
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{
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LCDx->INTMSK = LCDx->INTMSK & ~(ints);
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}
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/**
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* @brief Clear Controller Interrupt
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param ints : OR'ed interrupt bits to clear
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* @return None
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*/
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STATIC INLINE void IP_LCD_ClearInts(IP_LCD_001_Type *LCDx, uint32_t ints)
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{
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LCDx->INTCLR = LCDx->INTMSK & (ints);
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}
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/**
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* @brief Initialize the LCD controller
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param LCD_ConfigStruct : Pointer to LCD configuration
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* @return LCD_FUNC_OK is executed successfully or LCD_FUNC_ERR on error
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*/
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void IP_LCD_Init(IP_LCD_001_Type *LCDx, LCD_Config_Type *LCD_ConfigStruct);
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/**
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* @brief Power the LCD Panel (power pin)
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param OnOff : true to power on, false to power off
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* @return None
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*/
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void IP_LCD_Power(IP_LCD_001_Type *LCDx, FunctionalState OnOff);
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/**
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* @brief Enable/Disable the LCD Controller
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param EnDis : true to enable, false to disable
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* @return None
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*/
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void IP_LCD_Enable(IP_LCD_001_Type *LCDx, FunctionalState EnDis);
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/**
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* @brief Set LCD Upper Panel Frame Buffer for Single Panel or Upper Panel Frame
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* Buffer for Dual Panel
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param buffer : address of buffer
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* @return None
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*/
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void IP_LCD_SetUPFrameBuffer(IP_LCD_001_Type *LCDx, void *buffer);
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/**
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* @brief Set LCD Lower Panel Frame Buffer for Dual Panel
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param buffer : address of buffer
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* @return None
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*/
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void IP_LCD_SetLPFrameBuffer(IP_LCD_001_Type *LCDx, void *buffer);
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/**
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* @brief Configure Cursor
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param cursor_size : specify size of cursor
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* - LCD_CURSOR_32x32 :cursor size is 32x32 pixels
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* - LCD_CURSOR_64x64 :cursor size is 64x64 pixels
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* @param sync : cursor sync mode
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* - TRUE :cursor sync to the frame sync pulse
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* - FALSE :cursor async mode
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* @return None
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*/
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void IP_LCD_Cursor_Config(IP_LCD_001_Type *LCDx, LCD_CURSOR_SIZE_OPT cursor_size, bool sync);
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/**
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* @brief Get Internal Cursor Image Buffer Address
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param cursor_num : specify number of cursor is going to be written
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* this param must < 4
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* @return Cursor Image Buffer Address
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*/
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void *IP_LCD_Cursor_GetImageBufferAddress(IP_LCD_001_Type *LCDx, uint8_t cursor_num);
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/**
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* @brief Enable Cursor
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param cursor_num : specify number of cursor is going to be written
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* this param must < 4
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* @param OnOff : true to turn on LCD, false to turn off
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* @return None
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*/
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void IP_LCD_Cursor_Enable(IP_LCD_001_Type *LCDx, uint8_t cursor_num, FunctionalState OnOff);
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/**
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* @brief Load Cursor Palette
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param palette_color : cursor palette 0 value
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* @return None
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*/
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void IP_LCD_Cursor_LoadPalette0(IP_LCD_001_Type *LCDx, uint32_t palette_color);
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/**
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* @brief Load Cursor Palette
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param palette_color : cursor palette 1 value
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* @return None
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*/
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void IP_LCD_Cursor_LoadPalette1(IP_LCD_001_Type *LCDx, uint32_t palette_color);
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/**
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* @brief Set Cursor Position
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param x : horizontal position
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* @param y : vertical position
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* @return None
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*/
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void IP_LCD_Cursor_SetPos(IP_LCD_001_Type *LCDx, uint16_t x, uint16_t y);
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/**
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* @brief Set Cursor Clipping Position
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param x : horizontal position, should be in range: 0..63
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* @param y : vertical position, should be in range: 0..63
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* @return None
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*/
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void IP_LCD_Cursor_SetClip(IP_LCD_001_Type *LCDx, uint16_t x, uint16_t y);
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/**
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* @brief Load a color Palette entry
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* @param LCDx : pointer to LCD Controller Reg Struct
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* @param palette_addr : Address of palette table to load from
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* @param index : palette entry index to load
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* @return None
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*/
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void IP_LCD_Color_LoadPalette(IP_LCD_001_Type *LCDx, uint32_t *palette_addr, uint32_t index);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __LCD_001_H_ */
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