354 lines
10 KiB
C
354 lines
10 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-04 stevetong459 first version
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* 2022-07-15 Aligagago add apm32F4 serie MCU support
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* 2022-12-26 luobeihai add apm32F0 serie MCU support
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*/
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#include "drv_spi.h"
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//#define DRV_DEBUG
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#define LOG_TAG "drv.spi"
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#include "drv_log.h"
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#if defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3)
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static struct apm32_spi_config spi_config[] = {
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#ifdef BSP_USING_SPI1
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{SPI1, "spi1"},
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#endif
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#ifdef BSP_USING_SPI2
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{SPI2, "spi2"},
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#endif
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#ifdef BSP_USING_SPI3
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{SPI3, "spi3"},
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#endif
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};
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static struct apm32_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])] = {0};
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/**
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* Attach the spi device to SPI bus, this function must be used after initialization.
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_T *cs_gpiox, uint16_t cs_gpio_pin)
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{
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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rt_err_t result;
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struct rt_spi_device *spi_device;
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struct apm32_spi_cs *cs_pin;
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GPIO_Config_T GPIO_InitStructure;
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/* initialize the cs pin && select the slave */
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#if defined(SOC_SERIES_APM32F0)
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GPIO_ConfigStructInit(&GPIO_InitStructure);
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GPIO_InitStructure.pin = cs_gpio_pin;
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GPIO_InitStructure.speed = GPIO_SPEED_50MHz;
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GPIO_InitStructure.mode = GPIO_MODE_OUT;
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GPIO_InitStructure.outtype = GPIO_OUT_TYPE_PP;
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GPIO_InitStructure.pupd = GPIO_PUPD_NO;
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GPIO_Config(cs_gpiox, &GPIO_InitStructure);
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GPIO_WriteBitValue(cs_gpiox, cs_gpio_pin, Bit_SET);
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#elif defined(SOC_SERIES_APM32F1)
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GPIO_ConfigStructInit(&GPIO_InitStructure);
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GPIO_InitStructure.pin = cs_gpio_pin;
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GPIO_InitStructure.mode = GPIO_MODE_OUT_PP;
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GPIO_InitStructure.speed = GPIO_SPEED_50MHz;
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GPIO_Config(cs_gpiox, &GPIO_InitStructure);
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GPIO_WriteBitValue(cs_gpiox, cs_gpio_pin, BIT_SET);
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#elif defined(SOC_SERIES_APM32F4)
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GPIO_ConfigStructInit(&GPIO_InitStructure);
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GPIO_InitStructure.pin = cs_gpio_pin;
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GPIO_InitStructure.speed = GPIO_SPEED_100MHz;
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GPIO_InitStructure.mode = GPIO_MODE_OUT;
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GPIO_InitStructure.otype = GPIO_OTYPE_PP;
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GPIO_InitStructure.pupd = GPIO_PUPD_NOPULL;
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GPIO_Config(cs_gpiox, &GPIO_InitStructure);
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GPIO_WriteBitValue(cs_gpiox, cs_gpio_pin, BIT_SET);
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#endif
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/* attach the device to spi bus */
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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cs_pin = (struct apm32_spi_cs *)rt_malloc(sizeof(struct apm32_spi_cs));
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RT_ASSERT(cs_pin != RT_NULL);
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cs_pin->GPIOx = cs_gpiox;
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cs_pin->GPIO_Pin = cs_gpio_pin;
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result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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if (result != RT_EOK)
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{
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LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
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}
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RT_ASSERT(result == RT_EOK);
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LOG_D("%s attach to %s done", device_name, bus_name);
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return result;
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}
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static rt_err_t apm32_spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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SPI_Config_T hw_spi_config;
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struct rt_spi_bus * apm32_spi_bus = (struct rt_spi_bus *)device->bus;
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struct apm32_spi *spi_device = (struct apm32_spi *)apm32_spi_bus->parent.user_data;
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SPI_T *spi = spi_device->config->spi_x;
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uint32_t hw_spi_apb_clock;
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#if (DBG_LVL == DBG_LOG)
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uint32_t hw_spi_sys_clock = RCM_ReadSYSCLKFreq();
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#endif
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/* apm32 spi gpio init and enable clock */
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extern void apm32_msp_spi_init(void *Instance);
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apm32_msp_spi_init(spi);
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/* apm32 spi init */
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hw_spi_config.mode = (cfg->mode & RT_SPI_SLAVE) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
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hw_spi_config.direction = (cfg->mode & RT_SPI_3WIRE) ? SPI_DIRECTION_1LINE_RX : SPI_DIRECTION_2LINES_FULLDUPLEX;
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hw_spi_config.phase = (cfg->mode & RT_SPI_CPHA) ? SPI_CLKPHA_2EDGE : SPI_CLKPHA_1EDGE;
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hw_spi_config.polarity = (cfg->mode & RT_SPI_CPOL) ? SPI_CLKPOL_HIGH : SPI_CLKPOL_LOW;
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#if defined(SOC_SERIES_APM32F0)
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hw_spi_config.slaveSelect = (cfg->mode & RT_SPI_NO_CS) ? SPI_SSC_DISABLE : SPI_SSC_ENABLE;
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hw_spi_config.firstBit = (cfg->mode & RT_SPI_MSB) ? SPI_FIRST_BIT_MSB : SPI_FIRST_BIT_LSB;
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#else
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hw_spi_config.nss = (cfg->mode & RT_SPI_NO_CS) ? SPI_NSS_HARD : SPI_NSS_SOFT;
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hw_spi_config.firstBit = (cfg->mode & RT_SPI_MSB) ? SPI_FIRSTBIT_MSB : SPI_FIRSTBIT_LSB;
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#endif
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if (cfg->data_width == 8)
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{
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hw_spi_config.length = SPI_DATA_LENGTH_8B;
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}
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else if (cfg->data_width == 16)
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{
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hw_spi_config.length = SPI_DATA_LENGTH_16B;
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}
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else
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{
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return -RT_EIO;
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}
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#if defined(SOC_SERIES_APM32F0)
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hw_spi_apb_clock = RCM_ReadPCLKFreq();
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#else
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if (spi == SPI1)
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{
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RCM_ReadPCLKFreq(NULL, &hw_spi_apb_clock);
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}
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else
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{
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RCM_ReadPCLKFreq(&hw_spi_apb_clock, NULL);
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}
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#endif
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if (cfg->max_hz >= hw_spi_apb_clock / 2)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_2;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 4)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_4;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 8)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_8;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 16)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_16;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 32)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_32;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 64)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_64;
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}
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else if (cfg->max_hz >= hw_spi_apb_clock / 128)
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{
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_128;
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}
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else
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{
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/* min prescaler 256 */
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hw_spi_config.baudrateDiv = SPI_BAUDRATE_DIV_256;
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}
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LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d",
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hw_spi_sys_clock, hw_spi_apb_clock, cfg->max_hz, hw_spi_config.baudrateDiv);
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#if defined(SOC_SERIES_APM32F0)
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SPI_DisableCRC(spi);
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SPI_EnableSSoutput(spi);
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SPI_ConfigFIFOThreshold(spi, SPI_RXFIFO_QUARTER);
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#endif
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SPI_Config(spi, &hw_spi_config);
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SPI_Enable(spi);
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return RT_EOK;
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}
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static rt_ssize_t apm32_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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struct rt_spi_configuration *config = &device->config;
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struct apm32_spi_cs *cs = device->parent.user_data;
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struct rt_spi_bus * apm32_spi_bus = (struct rt_spi_bus *)device->bus;
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struct apm32_spi *spi_device = (struct apm32_spi *)apm32_spi_bus->parent.user_data;
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SPI_T *spi = spi_device->config->spi_x;
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/* take CS */
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if (message->cs_take)
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{
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#if defined(SOC_SERIES_APM32F0)
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GPIO_WriteBitValue(cs->GPIOx, cs->GPIO_Pin, (GPIO_BSRET_T)RESET);
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#else
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GPIO_WriteBitValue(cs->GPIOx, cs->GPIO_Pin, RESET);
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#endif
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LOG_D("spi take cs\n");
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}
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if (config->data_width <= 8)
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{
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const rt_uint8_t *send_ptr = message->send_buf;
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rt_uint8_t *recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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LOG_D("spi poll transfer start: %d\n", size);
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while (size--)
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{
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rt_uint8_t data = 0xFF;
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if (send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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#if defined(SOC_SERIES_APM32F0)
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/* Wait until the transmit buffer is empty */
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while (SPI_ReadStatusFlag(spi, SPI_FLAG_TXBE) == RESET);
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SPI_TxData8(spi, data);
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/* Wait until a data is received */
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while (SPI_ReadStatusFlag(spi, SPI_FLAG_RXBNE) == RESET);
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data = SPI_RxData8(spi);
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#else
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/* Wait until the transmit buffer is empty */
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while (SPI_I2S_ReadStatusFlag(spi, SPI_FLAG_TXBE) == RESET);
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SPI_I2S_TxData(spi, data);
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/* Wait until a data is received */
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while (SPI_I2S_ReadStatusFlag(spi, SPI_FLAG_RXBNE) == RESET);
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data = SPI_I2S_RxData(spi);
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#endif
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if (recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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LOG_D("spi poll transfer finsh\n");
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}
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else if (config->data_width <= 16)
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{
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const rt_uint16_t *send_ptr = message->send_buf;
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rt_uint16_t *recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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while (size--)
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{
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rt_uint16_t data = 0xFF;
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if (send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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#if defined(SOC_SERIES_APM32F0)
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/* Wait until the transmit buffer is empty */
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while (SPI_ReadStatusFlag(spi, SPI_FLAG_TXBE) == RESET);
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SPI_I2S_TxData16(spi, data);
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/* Wait until a data is received */
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while (SPI_ReadStatusFlag(spi, SPI_FLAG_RXBNE) == RESET);
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data = SPI_I2S_RxData16(spi);
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#else
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/* Wait until the transmit buffer is empty */
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while (SPI_I2S_ReadStatusFlag(spi, SPI_FLAG_TXBE) == RESET);
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/* Send the byte */
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SPI_I2S_TxData(spi, data);
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/* Wait until a data is received */
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while (SPI_I2S_ReadStatusFlag(spi, SPI_FLAG_RXBNE) == RESET);
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/* Get the received data */
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data = SPI_I2S_RxData(spi);
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#endif
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if (recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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}
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/* release CS */
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if (message->cs_release)
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{
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#if defined(SOC_SERIES_APM32F0)
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GPIO_WriteBitValue(cs->GPIOx, cs->GPIO_Pin, (GPIO_BSRET_T)SET);
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#else
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GPIO_WriteBitValue(cs->GPIOx, cs->GPIO_Pin, SET);
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#endif
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LOG_D("spi release cs\n");
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}
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return message->length;
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};
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static const struct rt_spi_ops apm32_spi_ops =
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{
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apm32_spi_configure,
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apm32_spi_xfer
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};
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static int rt_hw_spi_init(void)
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{
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rt_err_t result;
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for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
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{
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spi_bus_obj[i].config = &spi_config[i];
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spi_bus_obj[i].spi_bus.parent.user_data = (void *)&spi_bus_obj[i];
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result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].spi_bus_name, &apm32_spi_ops);
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RT_ASSERT(result == RT_EOK);
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LOG_D("%s bus init done", spi_config[i].spi_bus_name);
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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#endif /* RT_USING_SPI */
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