rt-thread/.github/workflows
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[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722)
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align

* [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568
2022-03-29 11:08:25 +08:00
..
action.yml [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722) 2022-03-29 11:08:25 +08:00
action_tools.yml [ci] add scons tools test 2022-01-20 20:51:30 +08:00
action_utest.yml [ci] Optimize AutoTestCI trigger timing. 2022-01-20 20:51:30 +08:00
file_check.yml [update] format ci, add ignore config file. 2021-04-06 11:32:57 +08:00