87 lines
2.7 KiB
C
87 lines
2.7 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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* Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __BOARD_CONFIG_H__
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#define __BOARD_CONFIG_H__
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#include <rtconfig.h>
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#include "hc32_ll.h"
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#include "drv_config.h"
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/************************ USART port **********************/
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#if defined(BSP_USING_UART1)
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#define USART1_RX_PORT (GPIO_PORT_C)
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#define USART1_RX_PIN (GPIO_PIN_04)
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#define USART1_TX_PORT (GPIO_PORT_A)
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#define USART1_TX_PIN (GPIO_PIN_07)
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#endif
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#if defined(BSP_USING_UART2)
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#define USART2_RX_PORT (GPIO_PORT_A)
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#define USART2_RX_PIN (GPIO_PIN_03)
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#define USART2_TX_PORT (GPIO_PORT_A)
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#define USART2_TX_PIN (GPIO_PIN_02)
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#endif
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#if defined(BSP_USING_UART3)
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#define USART3_RX_PORT (GPIO_PORT_C)
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#define USART3_RX_PIN (GPIO_PIN_13)
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#define USART3_TX_PORT (GPIO_PORT_H)
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#define USART3_TX_PIN (GPIO_PIN_02)
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#endif
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#if defined(BSP_USING_UART4)
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#define USART4_RX_PORT (GPIO_PORT_B)
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#define USART4_RX_PIN (GPIO_PIN_09)
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#define USART4_TX_PORT (GPIO_PORT_E)
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#define USART4_TX_PIN (GPIO_PIN_06)
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#endif
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/*********** CAN configure *********/
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#if defined(BSP_USING_CAN1)
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#define CAN1_TX_PORT (GPIO_PORT_B)
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#define CAN1_TX_PIN (GPIO_PIN_07)
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#define CAN1_TX_PIN_FUNC (GPIO_FUNC_50)
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#define CAN1_RX_PORT (GPIO_PORT_B)
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#define CAN1_RX_PIN (GPIO_PIN_06)
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#define CAN1_RX_PIN_FUNC (GPIO_FUNC_51)
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#define CAN_STB_PORT (GPIO_PORT_D)
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#define CAN_STB_PIN (GPIO_PIN_15)
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#endif
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/*********** ADC configure *********/
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#if defined(BSP_USING_ADC1)
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#define ADC1_CH10_PORT (GPIO_PORT_C)
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#define ADC1_CH10_PIN (GPIO_PIN_00)
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#define ADC1_CH12_PORT (GPIO_PORT_C)
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#define ADC1_CH12_PIN (GPIO_PIN_02)
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#define ADC1_CH13_PORT (GPIO_PORT_C)
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#define ADC1_CH13_PIN (GPIO_PIN_03)
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#endif
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#if defined(BSP_USING_ADC2)
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//ADC2 has 7 channels CH0-CH7. ADC12_IN4-ADC12_IN11 means ADC2 CH0-CH7
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#define ADC2_CH7_PORT (GPIO_PORT_C)
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#define ADC2_CH7_PIN (GPIO_PIN_01)
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#endif
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#endif
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