afe6c0386d
add bsp n32g43xcl-stb,n32g45xcl-stb,n32g45xml-stb,n32g45xrl-stb,n32g457qel-stb,n32l40xcl-stb,n32l43xml-stb,n32l43xrl-stb,n32l436_evb,n32wb45xl-evb
40 lines
1.7 KiB
Plaintext
40 lines
1.7 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x1500;
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define symbol __ICFEDIT_size_heap__ = 0x300;
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/**** End of ICF editor section. ###ICF###*/
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export symbol __ICFEDIT_region_RAM_end__;
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define symbol __region_RAM1_start__ = 0x10000000;
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define symbol __region_RAM1_end__ = 0x1000FFFF;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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place in RAM1_region { section .sram }; |