270 lines
6.0 KiB
C
270 lines
6.0 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-07-13 Rbb666 first version
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*/
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#include "drv_pwm.h"
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#ifdef RT_USING_PWM
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#include <drivers/rt_drv_pwm.h>
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#include "drv_gpio.h"
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pwm"
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#include <drv_log.h>
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struct rt_device_pwm pwm_device;
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struct ifx_pwm
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{
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struct rt_device_pwm pwm_device;
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cyhal_pwm_t *pwm_obj;
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rt_uint8_t channel;
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char *name;
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rt_uint8_t gpio;
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};
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enum
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{
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#ifdef BSP_USING_PWM0
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PWM0_INDEX,
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#endif
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};
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static struct ifx_pwm ifx_pwm_obj[] =
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{
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#ifdef BSP_USING_PWM0
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PWM0_CONFIG,
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#endif
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};
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static void pwm_get_pin_number(void)
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{
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#ifdef BSP_USING_PWM0_CH7
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#ifdef BSP_USING_PWM0_PORT2
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(2, 2);
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#endif
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#ifdef BSP_USING_PWM0_PORT5
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(5, 6);
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#endif
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#ifdef BSP_USING_PWM0_PORT7
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(7, 7);
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#endif
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#ifdef BSP_USING_PWM0_PORT9
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(9, 4);
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#endif
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#ifdef BSP_USING_PWM0_PORT10
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(10, 2);
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#endif
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#ifdef BSP_USING_PWM0_PORT12
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ifx_pwm_obj[PWM0_INDEX].gpio = GET_PIN(12, 6);
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#endif
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#endif
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}
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static void pwm_get_channel(void)
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{
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#ifdef BSP_USING_PWM0_CH7
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ifx_pwm_obj[PWM0_INDEX].channel = 7;
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#endif
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}
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static rt_err_t drv_pwm_enable(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration, rt_bool_t enable)
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{
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/* get the value of channel */
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rt_uint32_t channel = configuration->channel;
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if (!configuration->complementary || configuration->complementary)
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{
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if (!enable)
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{
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if (channel == 7)
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{
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cyhal_pwm_stop(htim);
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}
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}
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else
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{
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if (channel == 7)
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{
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cyhal_pwm_start(htim);
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}
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}
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}
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return RT_EOK;
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}
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static rt_err_t drv_pwm_set(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration)
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{
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rt_uint64_t tim_clock;
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rt_uint32_t period, pulse;
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tim_clock = (rt_uint32_t)(htim->tcpwm.clock_hz);
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period = (unsigned long long)configuration->period / 1000ULL;
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pulse = (unsigned long long)configuration->pulse / 1000ULL;
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cyhal_pwm_set_period(htim, period, pulse);
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return RT_EOK;
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}
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static rt_err_t drv_pwm_get(cyhal_pwm_t *htim, struct rt_pwm_configuration *configuration)
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{
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uint32_t Period = Cy_TCPWM_PWM_GetPeriod0(htim->tcpwm.base, _CYHAL_TCPWM_CNT_NUMBER(htim->tcpwm.resource));
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uint32_t Compare = Cy_TCPWM_PWM_GetCounter(htim->tcpwm.base, _CYHAL_TCPWM_CNT_NUMBER(htim->tcpwm.resource));
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configuration->period = Period;
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configuration->pulse = Compare;
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return RT_EOK;
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}
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static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
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{
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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cyhal_pwm_t *htim = (cyhal_pwm_t *)device->parent.user_data;
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switch (cmd)
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{
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case PWMN_CMD_ENABLE:
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configuration->complementary = RT_TRUE;
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case PWM_CMD_ENABLE:
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return drv_pwm_enable(htim, configuration, RT_TRUE);
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case PWMN_CMD_DISABLE:
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configuration->complementary = RT_FALSE;
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case PWM_CMD_DISABLE:
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return drv_pwm_enable(htim, configuration, RT_FALSE);
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case PWM_CMD_SET:
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return drv_pwm_set(htim, configuration);
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case PWM_CMD_GET:
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return drv_pwm_get(htim, configuration);
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default:
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return RT_EINVAL;
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}
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}
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static struct rt_pwm_ops drv_ops =
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{
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drv_pwm_control
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};
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static rt_err_t ifx_hw_pwm_init(struct ifx_pwm *device)
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{
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rt_err_t result = RT_EOK;
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RT_ASSERT(device != RT_NULL);
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/* config pwm channel */
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if (device->channel == 0x07)
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{
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if (cyhal_pwm_init_adv(device->pwm_obj, device->gpio, NC, CYHAL_PWM_LEFT_ALIGN, true, 0u, false, RT_NULL) != RT_EOK)
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{
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LOG_E("%s channel7 config failed", device->name);
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result = -RT_ERROR;
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goto __exit;
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}
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}
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__exit:
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return result;
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}
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static int rt_hw_pwm_init(void)
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{
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int i;
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int result = RT_EOK;
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pwm_get_pin_number();
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pwm_get_channel();
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for (i = 0; i < sizeof(ifx_pwm_obj) / sizeof(ifx_pwm_obj[0]); i++)
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{
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ifx_pwm_obj[i].pwm_obj = rt_malloc(sizeof(cyhal_pwm_t));
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RT_ASSERT(ifx_pwm_obj[i].pwm_obj != RT_NULL);
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/* pwm init */
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if (ifx_hw_pwm_init(&ifx_pwm_obj[i]) != RT_EOK)
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{
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LOG_E("%s init failed", ifx_pwm_obj[i].name);
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result = -RT_ERROR;
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goto __exit;
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}
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else
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{
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if (rt_device_pwm_register(&ifx_pwm_obj[i].pwm_device, ifx_pwm_obj[i].name, &drv_ops, ifx_pwm_obj[i].pwm_obj) == RT_EOK)
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{
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LOG_D("%s register success", ifx_pwm_obj[i].name);
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}
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else
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{
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LOG_D("%s register failed", ifx_pwm_obj[i].name);
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result = -RT_ERROR;
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}
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}
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}
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__exit:
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_pwm_init);
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#define PWM_DEV_NAME "pwm0"
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#define PWM_DEV_CHANNEL 7
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struct rt_device_pwm *pwm_dev;
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static int pwm_sample(int argc, char *argv[])
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{
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rt_uint32_t period, pulse, dir;
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period = 500000;
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dir = 1;
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pulse = 0;
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pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME);
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if (pwm_dev == RT_NULL)
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{
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rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_DEV_NAME);
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return RT_ERROR;
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}
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rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
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rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
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while (1)
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{
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rt_thread_mdelay(50);
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if (dir)
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{
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pulse += 5000;
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}
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else
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{
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pulse -= 5000;
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}
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if (pulse >= period)
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{
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dir = 0;
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}
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if (0 == pulse)
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{
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dir = 1;
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}
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rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, pulse);
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}
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}
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MSH_CMD_EXPORT(pwm_sample, <pwm0> channel7 sample);
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#endif
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