1371 lines
42 KiB
C
1371 lines
42 KiB
C
/**********************************************************************
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* $Id$ lpc177x_8x_uart.c 2011-06-02
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*//**
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* @file lpc177x_8x_uart.c
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* @brief Contains all functions support for UART firmware library
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* on LPC177x_8x
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* @version 1.0
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* @date 02. June. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @addtogroup UART
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* @{
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*/
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/* Includes ------------------------------------------------------------------- */
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#include "lpc177x_8x_uart.h"
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#include "lpc177x_8x_clkpwr.h"
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/* Private Functions ---------------------------------------------------------- */
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static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
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/*********************************************************************//**
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* @brief Determines best dividers to get a target clock rate
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* @param[in] UARTx Pointer to selected UART peripheral, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* @param[in] baudrate Desired UART baud rate.
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* @return Error status, could be:
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* - SUCCESS
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* - ERROR
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**********************************************************************/
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static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
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{
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Status errorStatus = ERROR;
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uint32_t uClk;
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uint32_t d, m, bestd, bestm, tmp;
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uint64_t best_divisor, divisor;
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uint32_t current_error, best_error;
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uint32_t recalcbaud;
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/* get UART block clock */
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uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
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/* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
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* The formula is :
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* BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
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* It involves floating point calculations. That's the reason the formulae are adjusted with
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* Multiply and divide method.*/
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/* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
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* 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
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best_error = 0xFFFFFFFF; /* Worst case */
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bestd = 0;
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bestm = 0;
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best_divisor = 0;
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for (m = 1 ; m <= 15 ;m++)
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{
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for (d = 0 ; d < m ; d++)
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{
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divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d));
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current_error = divisor & 0xFFFFFFFF;
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tmp = divisor>>32;
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/* Adjust error */
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if(current_error > ((uint32_t)1<<31))
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{
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current_error = -current_error;
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tmp++;
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}
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/* Out of range */
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if(tmp < 1 || tmp > 65536)
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continue;
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if( current_error < best_error)
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{
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best_error = current_error;
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best_divisor = tmp;
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bestd = d;
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bestm = m;
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if(best_error == 0)
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break;
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}
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} /* end of inner for loop */
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if (best_error == 0)
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break;
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} /* end of outer for loop */
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/* can not find best match */
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if(best_divisor == 0)
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return ERROR;
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recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd));
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/* reuse best_error to evaluate baud error*/
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if(baudrate > recalcbaud)
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best_error = baudrate - recalcbaud;
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else
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best_error = recalcbaud -baudrate;
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best_error = best_error * 100 / baudrate;
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if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
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{
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
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((LPC_UART1_TypeDef *)UARTx)->DLM = UART_LOAD_DLM(best_divisor);
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((LPC_UART1_TypeDef *)UARTx)->DLL = UART_LOAD_DLL(best_divisor);
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/* Then reset DLAB bit */
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((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
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((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm)
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| UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
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}
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else
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{
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UARTx->LCR |= UART_LCR_DLAB_EN;
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UARTx->DLM = UART_LOAD_DLM(best_divisor);
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UARTx->DLL = UART_LOAD_DLL(best_divisor);
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/* Then reset DLAB bit */
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UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
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UARTx->FDR = (UART_FDR_MULVAL(bestm) \
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| UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
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}
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errorStatus = SUCCESS;
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}
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return errorStatus;
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}
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/* End of Private Functions ---------------------------------------------------- */
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/* Public Functions ----------------------------------------------------------- */
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/** @addtogroup UART_Public_Functions
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* @{
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*/
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/* UART Init/DeInit functions -------------------------------------------------*/
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/********************************************************************//**
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* @brief Initializes the UARTx peripheral according to the specified
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* parameters in the UART_ConfigStruct.
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* @param[in] UARTx UART peripheral selected, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* - LPC_UART4: UART4 peripheral
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* @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
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* that contains the configuration information for the
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* specified UART peripheral.
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* @return None
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*********************************************************************/
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void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
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{
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uint32_t tmp;
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if(UARTx == LPC_UART0)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
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}
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if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
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}
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if(UARTx == LPC_UART2)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
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}
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if(UARTx == LPC_UART3)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
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}
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/* FIFOs are empty */
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UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
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// Disable FIFO
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UARTx->FCR = 0;
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// Dummy reading
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while (UARTx->LSR & UART_LSR_RDR)
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{
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tmp = UARTx->RBR;
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}
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UARTx->TER = UART_TER_TXEN;
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// Wait for current transmit complete
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while (!(UARTx->LSR & UART_LSR_THRE));
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// Disable Tx
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UARTx->TER = 0;
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// Disable interrupt
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UARTx->IER = 0;
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// Set LCR to default state
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UARTx->LCR = 0;
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// Set ACR to default state
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UARTx->ACR = 0;
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// Set RS485 control to default state
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UARTx->RS485CTRL = 0;
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// Set RS485 delay timer to default state
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UARTx->RS485DLY = 0;
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// Set RS485 addr match to default state
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UARTx->ADRMATCH = 0;
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// Dummy reading
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tmp = UARTx->LSR;
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if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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// Set Modem Control to default state
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((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
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//Dummy Reading to Clear Status
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tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
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}
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else
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{
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// Set IrDA to default state for all UART other than UART1
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UARTx->ICR = 0;
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}
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// Set Line Control register ----------------------------
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uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
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& UART_LCR_BITMASK;
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}
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else
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{
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tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
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}
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switch (UART_ConfigStruct->Databits)
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{
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case UART_DATABIT_5:
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tmp |= UART_LCR_WLEN5;
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break;
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case UART_DATABIT_6:
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tmp |= UART_LCR_WLEN6;
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break;
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case UART_DATABIT_7:
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tmp |= UART_LCR_WLEN7;
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break;
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case UART_DATABIT_8:
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default:
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tmp |= UART_LCR_WLEN8;
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break;
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}
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if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
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{
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// Do nothing...
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}
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else
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{
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tmp |= UART_LCR_PARITY_EN;
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switch (UART_ConfigStruct->Parity)
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{
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case UART_PARITY_ODD:
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tmp |= UART_LCR_PARITY_ODD;
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break;
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case UART_PARITY_EVEN:
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tmp |= UART_LCR_PARITY_EVEN;
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break;
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case UART_PARITY_SP_1:
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tmp |= UART_LCR_PARITY_F_1;
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break;
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case UART_PARITY_SP_0:
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tmp |= UART_LCR_PARITY_F_0;
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break;
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default:
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break;
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}
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}
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switch (UART_ConfigStruct->Stopbits)
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{
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case UART_STOPBIT_2:
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tmp |= UART_LCR_STOPBIT_SEL;
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break;
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case UART_STOPBIT_1:
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default:
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// Do no thing
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break;
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}
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// Write back to LCR, configure FIFO and Disable Tx
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
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}
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else
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{
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UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
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}
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}
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/*********************************************************************//**
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* @brief De-initializes the UARTx peripheral registers to their
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* default reset values.
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* @param[in] UARTx UART peripheral selected, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* @return None
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**********************************************************************/
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void UART_DeInit(LPC_UART_TypeDef* UARTx)
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{
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UART_TxCmd(UARTx, DISABLE);
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if (UARTx == LPC_UART0)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
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}
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
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}
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if (UARTx == LPC_UART2)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
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}
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if (UARTx == LPC_UART3)
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{
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/* Set up clock and power for UART module */
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CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
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}
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}
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/*****************************************************************************//**
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* @brief Fills each UART_InitStruct member with its default value:
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* - 9600 bps
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* - 8-bit data
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* - 1 Stopbit
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* - None Parity
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* @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
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* which will be initialized.
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* @return None
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*******************************************************************************/
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void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
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{
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UART_InitStruct->Baud_rate = 9600;
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UART_InitStruct->Databits = UART_DATABIT_8;
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UART_InitStruct->Parity = UART_PARITY_NONE;
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UART_InitStruct->Stopbits = UART_STOPBIT_1;
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}
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/* UART Send/Recieve functions -------------------------------------------------*/
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/*********************************************************************//**
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* @brief Transmit a single data through UART peripheral
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* @param[in] UARTx UART peripheral selected, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* @param[in] Data Data to transmit (must be 8-bit long)
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* @return None
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**********************************************************************/
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void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
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{
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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((LPC_UART1_TypeDef *)UARTx)->THR = Data & UART_THR_MASKBIT;
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}
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else
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{
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UARTx->THR = Data & UART_THR_MASKBIT;
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}
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}
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/*********************************************************************//**
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* @brief Receive a single data from UART peripheral
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* @param[in] UARTx UART peripheral selected, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* @return Data received
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**********************************************************************/
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uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
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{
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if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
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{
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return (((LPC_UART1_TypeDef *)UARTx)->RBR & UART_RBR_MASKBIT);
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}
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else
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{
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return (UARTx->RBR & UART_RBR_MASKBIT);
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}
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}
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/*********************************************************************//**
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* @brief Send a block of data via UART peripheral
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* @param[in] UARTx Selected UART peripheral used to send data, should be:
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* - LPC_UART0: UART0 peripheral
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* - LPC_UART1: UART1 peripheral
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* - LPC_UART2: UART2 peripheral
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* - LPC_UART3: UART3 peripheral
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* @param[in] txbuf Pointer to Transmit buffer
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* @param[in] buflen Length of Transmit buffer
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* @param[in] flag Flag used in UART transfer, should be
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* NONE_BLOCKING or BLOCKING
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* @return Number of bytes sent.
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*
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* Note: when using UART in BLOCKING mode, a time-out condition is used
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* via defined symbol UART_BLOCKING_TIMEOUT.
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**********************************************************************/
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uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
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uint32_t buflen, TRANSFER_BLOCK_Type flag)
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{
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uint32_t bToSend, bSent, timeOut, fifo_cnt;
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uint8_t *pChar = txbuf;
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bToSend = buflen;
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// blocking mode
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if (flag == BLOCKING)
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{
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bSent = 0;
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while (bToSend)
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{
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timeOut = UART_BLOCKING_TIMEOUT;
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// Wait for THR empty with timeout
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while (!(UARTx->LSR & UART_LSR_THRE))
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{
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if (timeOut == 0)
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break;
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timeOut--;
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}
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// Time out!
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if(timeOut == 0)
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break;
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fifo_cnt = UART_TX_FIFO_SIZE;
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while (fifo_cnt && bToSend)
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{
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UART_SendByte(UARTx, (*pChar++));
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fifo_cnt--;
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bToSend--;
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bSent++;
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}
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}
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}
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// None blocking mode
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else
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{
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bSent = 0;
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while (bToSend)
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{
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if (bToSend == 0)
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break;
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if (!(UARTx->LSR & UART_LSR_THRE))
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{
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break;
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}
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|
|
fifo_cnt = UART_TX_FIFO_SIZE;
|
|
|
|
while (fifo_cnt && bToSend)
|
|
{
|
|
UART_SendByte(UARTx, (*pChar++));
|
|
|
|
bToSend--;
|
|
|
|
fifo_cnt--;
|
|
|
|
bSent++;
|
|
}
|
|
}
|
|
}
|
|
|
|
return bSent;
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Receive a block of data via UART peripheral
|
|
* @param[in] UARTx Selected UART peripheral used to send data,
|
|
* should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[out] rxbuf Pointer to Received buffer
|
|
* @param[in] buflen Length of Received buffer
|
|
* @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
|
|
|
|
* @return Number of bytes received
|
|
*
|
|
* Note: when using UART in BLOCKING mode, a time-out condition is used
|
|
* via defined symbol UART_BLOCKING_TIMEOUT.
|
|
**********************************************************************/
|
|
uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf,
|
|
uint32_t buflen, TRANSFER_BLOCK_Type flag)
|
|
{
|
|
uint32_t bToRecv, bRecv, timeOut;
|
|
uint8_t *pChar = rxbuf;
|
|
|
|
bToRecv = buflen;
|
|
|
|
// Blocking mode
|
|
if (flag == BLOCKING)
|
|
{
|
|
bRecv = 0;
|
|
while (bToRecv)
|
|
{
|
|
timeOut = UART_BLOCKING_TIMEOUT;
|
|
while (!(UARTx->LSR & UART_LSR_RDR))
|
|
{
|
|
if (timeOut == 0)
|
|
break;
|
|
|
|
timeOut--;
|
|
}
|
|
|
|
// Time out!
|
|
if(timeOut == 0)
|
|
break;
|
|
|
|
// Get data from the buffer
|
|
(*pChar++) = UART_ReceiveByte(UARTx);
|
|
|
|
bToRecv--;
|
|
|
|
bRecv++;
|
|
}
|
|
}
|
|
// None blocking mode
|
|
else
|
|
{
|
|
bRecv = 0;
|
|
while (bToRecv)
|
|
{
|
|
if (!(UARTx->LSR & UART_LSR_RDR))
|
|
{
|
|
break;
|
|
}
|
|
else
|
|
{
|
|
(*pChar++) = UART_ReceiveByte(UARTx);
|
|
|
|
bRecv++;
|
|
|
|
bToRecv--;
|
|
}
|
|
}
|
|
}
|
|
|
|
return bRecv;
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Force BREAK character on UART line, output pin UARTx TXD is
|
|
forced to logic 0.
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @return None
|
|
**********************************************************************/
|
|
void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
|
|
{
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
|
|
}
|
|
else
|
|
{
|
|
UARTx->LCR |= UART_LCR_BREAK_EN;
|
|
}
|
|
}
|
|
|
|
|
|
/********************************************************************//**
|
|
* @brief Enable or disable specified UART interrupt.
|
|
* @param[in] UARTx UART peripheral selected, should be
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[in] UARTIntCfg Specifies the interrupt flag,
|
|
* should be one of the following:
|
|
- UART_INTCFG_RBR : RBR Interrupt enable
|
|
- UART_INTCFG_THRE : THR Interrupt enable
|
|
- UART_INTCFG_RLS : RX line status interrupt enable
|
|
- UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
|
|
- UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
|
|
- UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
|
|
- UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
|
|
* @param[in] NewState New state of specified UART interrupt type,
|
|
* should be:
|
|
* - ENALBE: Enable this UART interrupt type.
|
|
* - DISALBE: Disable this UART interrupt type.
|
|
* @return None
|
|
*********************************************************************/
|
|
void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
|
|
{
|
|
uint32_t tmp;
|
|
|
|
switch(UARTIntCfg)
|
|
{
|
|
case UART_INTCFG_RBR:
|
|
tmp = UART_IER_RBRINT_EN;
|
|
break;
|
|
|
|
case UART_INTCFG_THRE:
|
|
tmp = UART_IER_THREINT_EN;
|
|
break;
|
|
|
|
case UART_INTCFG_RLS:
|
|
tmp = UART_IER_RLSINT_EN;
|
|
break;
|
|
|
|
case UART1_INTCFG_MS:
|
|
tmp = UART1_IER_MSINT_EN;
|
|
break;
|
|
|
|
case UART1_INTCFG_CTS:
|
|
tmp = UART1_IER_CTSINT_EN;
|
|
break;
|
|
|
|
case UART_INTCFG_ABEO:
|
|
tmp = UART_IER_ABEOINT_EN;
|
|
break;
|
|
|
|
case UART_INTCFG_ABTO:
|
|
tmp = UART_IER_ABTOINT_EN;
|
|
break;
|
|
}
|
|
|
|
if (NewState == ENABLE)
|
|
{
|
|
if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->IER |= tmp;
|
|
}
|
|
else
|
|
{
|
|
UARTx->IER |= tmp;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->IER &= (~tmp) & UART1_IER_BITMASK;
|
|
}
|
|
else
|
|
{
|
|
UARTx->IER &= (~tmp) & UART_IER_BITMASK;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/********************************************************************//**
|
|
* @brief Get current value of Line Status register in UART peripheral.
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @return Current value of Line Status register in UART peripheral.
|
|
* Note: The return value of this function must be ANDed with each member in
|
|
* UART_LS_Type enumeration to determine current flag status
|
|
* corresponding to each Line status type. Because some flags in
|
|
* Line Status register will be cleared after reading, the next reading
|
|
* Line Status register could not be correct. So this function used to
|
|
* read Line status register in one time only, then the return value
|
|
* used to check all flags.
|
|
*********************************************************************/
|
|
uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
|
|
{
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
|
|
}
|
|
else
|
|
{
|
|
return ((UARTx->LSR) & UART_LSR_BITMASK);
|
|
}
|
|
}
|
|
|
|
/********************************************************************//**
|
|
* @brief Get Interrupt Identification value
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @return Current value of UART UIIR register in UART peripheral.
|
|
*********************************************************************/
|
|
uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
|
|
{
|
|
return (UARTx->IIR & 0x03CF);
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Check whether if UART is busy or not
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @return RESET if UART is not busy, otherwise return SET.
|
|
**********************************************************************/
|
|
FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
|
|
{
|
|
if (UARTx->LSR & UART_LSR_TEMT)
|
|
{
|
|
return RESET;
|
|
}
|
|
else
|
|
{
|
|
return SET;
|
|
}
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Configure FIFO function on selected UART peripheral
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
|
|
* contains specified information about FIFO configuration
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
|
|
{
|
|
uint8_t tmp = 0;
|
|
|
|
tmp |= UART_FCR_FIFO_EN;
|
|
|
|
switch (FIFOCfg->FIFO_Level)
|
|
{
|
|
case UART_FIFO_TRGLEV0:
|
|
tmp |= UART_FCR_TRG_LEV0;
|
|
break;
|
|
|
|
case UART_FIFO_TRGLEV1:
|
|
tmp |= UART_FCR_TRG_LEV1;
|
|
break;
|
|
|
|
case UART_FIFO_TRGLEV2:
|
|
tmp |= UART_FCR_TRG_LEV2;
|
|
break;
|
|
|
|
case UART_FIFO_TRGLEV3:
|
|
|
|
default:
|
|
tmp |= UART_FCR_TRG_LEV3;
|
|
break;
|
|
}
|
|
|
|
if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
|
|
{
|
|
tmp |= UART_FCR_TX_RS;
|
|
}
|
|
|
|
if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
|
|
{
|
|
tmp |= UART_FCR_RX_RS;
|
|
}
|
|
|
|
if (FIFOCfg->FIFO_DMAMode == ENABLE)
|
|
{
|
|
tmp |= UART_FCR_DMAMODE_SEL;
|
|
}
|
|
|
|
|
|
//write to FIFO control register
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->FCR = tmp & UART_FCR_BITMASK;
|
|
}
|
|
else
|
|
{
|
|
UARTx->FCR = tmp & UART_FCR_BITMASK;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************//**
|
|
* @brief Fills each UART_FIFOInitStruct member with its default value:
|
|
* - FIFO_DMAMode = DISABLE
|
|
* - FIFO_Level = UART_FIFO_TRGLEV0
|
|
* - FIFO_ResetRxBuf = ENABLE
|
|
* - FIFO_ResetTxBuf = ENABLE
|
|
* - FIFO_State = ENABLE
|
|
|
|
* @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
|
|
* which will be initialized.
|
|
* @return None
|
|
*******************************************************************************/
|
|
void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
|
|
{
|
|
UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
|
|
|
|
UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
|
|
|
|
UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
|
|
|
|
UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Start/Stop Auto Baudrate activity
|
|
* @param[in] UARTx UART peripheral selected, should be
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
|
|
* contains specified information about UART
|
|
* auto baudrate configuration
|
|
* @param[in] NewState New State of Auto baudrate activity, should be:
|
|
* - ENABLE: Start this activity
|
|
* - DISABLE: Stop this activity
|
|
* Note: Auto-baudrate mode enable bit will be cleared once this mode
|
|
* completed.
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct,
|
|
FunctionalState NewState)
|
|
{
|
|
uint32_t tmp;
|
|
|
|
tmp = 0;
|
|
if (NewState == ENABLE)
|
|
{
|
|
if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1)
|
|
{
|
|
tmp |= UART_ACR_MODE;
|
|
}
|
|
if (ABConfigStruct->AutoRestart == ENABLE)
|
|
{
|
|
tmp |= UART_ACR_AUTO_RESTART;
|
|
}
|
|
}
|
|
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
// Clear DLL and DLM value
|
|
((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
|
|
|
|
((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
|
|
|
|
((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
|
|
|
|
((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
|
|
|
|
// FDR value must be reset to default value
|
|
((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
|
|
|
|
((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
|
|
}
|
|
else
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
// Clear DLL and DLM value
|
|
UARTx->LCR |= UART_LCR_DLAB_EN;
|
|
|
|
UARTx->DLL = 0;
|
|
|
|
UARTx->DLM = 0;
|
|
|
|
UARTx->LCR &= ~UART_LCR_DLAB_EN;
|
|
|
|
// FDR value must be reset to default value
|
|
UARTx->FDR = 0x10;
|
|
|
|
UARTx->ACR = UART_ACR_START | tmp;
|
|
}
|
|
else
|
|
{
|
|
UARTx->ACR = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Clear Autobaud Interrupt Pending
|
|
* @param[in] UARTx UART peripheral selected, should be
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[in] ABIntType type of auto-baud interrupt, should be:
|
|
* - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
|
|
* - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
|
|
{
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
UARTx->ACR |= ABIntType;
|
|
}
|
|
else
|
|
UARTx->ACR |= ABIntType;
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Enable/Disable transmission on UART TxD pin
|
|
* @param[in] UARTx UART peripheral selected, should be:
|
|
* - LPC_UART0: UART0 peripheral
|
|
* - LPC_UART1: UART1 peripheral
|
|
* - LPC_UART2: UART2 peripheral
|
|
* - LPC_UART3: UART3 peripheral
|
|
* @param[in] NewState New State of Tx transmission function, should be:
|
|
* - ENABLE: Enable this function
|
|
- DISABLE: Disable this function
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
|
|
}
|
|
else
|
|
{
|
|
UARTx->TER |= UART_TER_TXEN;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
|
|
{
|
|
((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
|
|
}
|
|
else
|
|
{
|
|
UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* UART IrDA functions ---------------------------------------------------*/
|
|
/*********************************************************************//**
|
|
* @brief Enable or disable inverting serial input function of IrDA
|
|
* on UART peripheral.
|
|
* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
|
|
* @param[in] NewState New state of inverting serial input, should be:
|
|
* - ENABLE: Enable this function.
|
|
* - DISABLE: Disable this function.
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
UARTx->ICR |= UART_ICR_IRDAINV;
|
|
}
|
|
else if (NewState == DISABLE)
|
|
{
|
|
UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
|
|
}
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Enable or disable IrDA function on UART peripheral.
|
|
* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
|
|
* @param[in] NewState New state of IrDA function, should be:
|
|
* - ENABLE: Enable this function.
|
|
* - DISABLE: Disable this function.
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
UARTx->ICR |= UART_ICR_IRDAEN;
|
|
}
|
|
else
|
|
{
|
|
UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
|
|
}
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Configure Pulse divider for IrDA function on UART peripheral.
|
|
* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
|
|
* @param[in] PulseDiv Pulse Divider value from Peripheral clock,
|
|
* should be one of the following:
|
|
- UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
|
|
- UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
|
|
- UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
|
|
- UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
|
|
- UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
|
|
- UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
|
|
- UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
|
|
- UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
|
|
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
|
|
{
|
|
uint32_t tmp, tmp1;
|
|
|
|
tmp1 = UART_ICR_PULSEDIV(PulseDiv);
|
|
|
|
tmp = UARTx->ICR & (~ UART_ICR_PULSEDIV(7));
|
|
|
|
tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
|
|
|
|
UARTx->ICR = tmp & UART_ICR_BITMASK;
|
|
}
|
|
|
|
/* UART1 FullModem function ---------------------------------------------*/
|
|
|
|
/*********************************************************************//**
|
|
* @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] Pin Pin that NewState will be applied to, should be:
|
|
* - UART1_MODEM_PIN_DTR: DTR pin.
|
|
* - UART1_MODEM_PIN_RTS: RTS pin.
|
|
* @param[in] NewState New State of DTR/RTS pin, should be:
|
|
* - INACTIVE: Force the pin to inactive signal.
|
|
- ACTIVE: Force the pin to active signal.
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx,
|
|
UART_MODEM_PIN_Type Pin,
|
|
UART1_SignalState NewState)
|
|
{
|
|
uint8_t tmp = 0;
|
|
|
|
switch (Pin)
|
|
{
|
|
case UART1_MODEM_PIN_DTR:
|
|
tmp = UART1_MCR_DTR_CTRL;
|
|
break;
|
|
|
|
case UART1_MODEM_PIN_RTS:
|
|
tmp = UART1_MCR_RTS_CTRL;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (NewState == ACTIVE)
|
|
{
|
|
UARTx->MCR |= tmp;
|
|
}
|
|
else
|
|
{
|
|
UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
|
|
}
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Configure Full Modem mode for UART peripheral
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] Mode Full Modem mode, should be:
|
|
* - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
|
|
* - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
|
|
* - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
|
|
* @param[in] NewState New State of this mode, should be:
|
|
* - ENABLE: Enable this mode.
|
|
- DISABLE: Disable this mode.
|
|
* @return none
|
|
**********************************************************************/
|
|
void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode,
|
|
FunctionalState NewState)
|
|
{
|
|
uint8_t tmp;
|
|
|
|
switch(Mode)
|
|
{
|
|
case UART1_MODEM_MODE_LOOPBACK:
|
|
tmp = UART1_MCR_LOOPB_EN;
|
|
break;
|
|
|
|
case UART1_MODEM_MODE_AUTO_RTS:
|
|
tmp = UART1_MCR_AUTO_RTS_EN;
|
|
break;
|
|
|
|
case UART1_MODEM_MODE_AUTO_CTS:
|
|
tmp = UART1_MCR_AUTO_CTS_EN;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (NewState == ENABLE)
|
|
{
|
|
UARTx->MCR |= tmp;
|
|
}
|
|
else
|
|
{
|
|
UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
|
|
}
|
|
}
|
|
|
|
|
|
/*********************************************************************//**
|
|
* @brief Get current status of modem status register
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @return Current value of modem status register
|
|
* Note: The return value of this function must be ANDed with each member
|
|
* UART_MODEM_STAT_type enumeration to determine current flag status
|
|
* corresponding to each modem flag status. Because some flags in
|
|
* modem status register will be cleared after reading, the next reading
|
|
* modem register could not be correct. So this function used to
|
|
* read modem status register in one time only, then the return value
|
|
* used to check all flags.
|
|
**********************************************************************/
|
|
uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
|
|
{
|
|
return ((UARTx->MSR) & UART1_MSR_BITMASK);
|
|
}
|
|
|
|
|
|
/* UART RS485 functions --------------------------------------------------------------*/
|
|
|
|
/*********************************************************************//**
|
|
* @brief Configure UART peripheral in RS485 mode according to the specified
|
|
* parameters in the RS485ConfigStruct.
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
|
|
* that contains the configuration information for specified UART
|
|
* in RS485 mode.
|
|
* @return None
|
|
**********************************************************************/
|
|
void UART_RS485Config(LPC_UART_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
|
|
{
|
|
uint32_t tmp;
|
|
|
|
tmp = 0;
|
|
|
|
// If Auto Direction Control is enabled - This function is used in Master mode
|
|
if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
|
|
{
|
|
tmp |= UART1_RS485CTRL_DCTRL_EN;
|
|
|
|
// Set polar
|
|
if (RS485ConfigStruct->DirCtrlPol_Level == SET)
|
|
{
|
|
tmp |= UART1_RS485CTRL_OINV_1;
|
|
}
|
|
|
|
// Set pin according to. This condition is only with UART1. The others are used
|
|
// OE pin as default for control the direction of RS485 buffer IC
|
|
if ((RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
|
|
&& ((LPC_UART1_TypeDef *)UARTx == LPC_UART1))
|
|
{
|
|
tmp |= UART1_RS485CTRL_SEL_DTR;
|
|
}
|
|
|
|
// Fill delay time
|
|
UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
|
|
}
|
|
|
|
// MultiDrop mode is enable
|
|
if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
|
|
{
|
|
tmp |= UART1_RS485CTRL_NMM_EN;
|
|
}
|
|
|
|
// Auto Address Detect function
|
|
if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
|
|
{
|
|
tmp |= UART1_RS485CTRL_AADEN;
|
|
|
|
// Fill Match Address
|
|
UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
|
|
}
|
|
|
|
// Receiver is disable
|
|
if (RS485ConfigStruct->Rx_State == DISABLE)
|
|
{
|
|
tmp |= UART1_RS485CTRL_RX_DIS;
|
|
}
|
|
|
|
// write back to RS485 control register
|
|
UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
|
|
|
|
// Enable Parity function and leave parity in stick '0' parity as default
|
|
UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Enable/Disable receiver in RS485 module in UART1
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] NewState New State of command, should be:
|
|
* - ENABLE: Enable this function.
|
|
* - DISABLE: Disable this function.
|
|
* @return None
|
|
**********************************************************************/
|
|
void UART_RS485ReceiverCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
|
|
{
|
|
if (NewState == ENABLE)
|
|
{
|
|
UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
|
|
}
|
|
else
|
|
{
|
|
UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
|
|
}
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] pDatFrm Pointer to data frame.
|
|
* @param[in] size Size of data.
|
|
* @param[in] ParityStick Parity Stick value, should be 0 or 1.
|
|
* @return None
|
|
**********************************************************************/
|
|
uint32_t UART_RS485Send(LPC_UART_TypeDef *UARTx, uint8_t *pDatFrm,
|
|
uint32_t size, uint8_t ParityStick)
|
|
{
|
|
uint8_t tmp, save;
|
|
uint32_t cnt;
|
|
|
|
if (ParityStick)
|
|
{
|
|
save = tmp = UARTx->LCR & UART_LCR_BITMASK;
|
|
|
|
tmp &= ~(UART_LCR_PARITY_EVEN);
|
|
|
|
UARTx->LCR = tmp;
|
|
|
|
cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
|
|
|
|
while (!(UARTx->LSR & UART_LSR_TEMT));
|
|
|
|
UARTx->LCR = save;
|
|
}
|
|
else
|
|
{
|
|
cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
|
|
|
|
while (!(UARTx->LSR & UART_LSR_TEMT));
|
|
}
|
|
|
|
return cnt;
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Send Slave address frames on RS485 bus.
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] SlvAddr Slave Address.
|
|
* @return None
|
|
**********************************************************************/
|
|
void UART_RS485SendSlvAddr(LPC_UART_TypeDef *UARTx, uint8_t SlvAddr)
|
|
{
|
|
UART_RS485Send(UARTx, &SlvAddr, 1, 1);
|
|
}
|
|
|
|
/*********************************************************************//**
|
|
* @brief Send Data frames on RS485 bus.
|
|
* @param[in] UARTx LPC_UART1 (only)
|
|
* @param[in] pData Pointer to data to be sent.
|
|
* @param[in] size Size of data frame to be sent.
|
|
* @return None
|
|
**********************************************************************/
|
|
uint32_t UART_RS485SendData(LPC_UART_TypeDef *UARTx, uint8_t *pData, uint32_t size)
|
|
{
|
|
return (UART_RS485Send(UARTx, pData, size, 0));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/* --------------------------------- End Of File ------------------------------ */
|
|
|