296 lines
7.4 KiB
C
296 lines
7.4 KiB
C
/****************************************************************************
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* $Id:: uart.c 3736 2010-06-24 02:07:03Z usb00423 $
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* Project: NXP LPC122x UART example
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*
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* Description:
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* This file contains UART code example which include UART
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* initialization, UART interrupt handler, and related APIs for
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* UART access.
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*
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****************************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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****************************************************************************/
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#include <rthw.h>
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#include <rtthread.h>
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#include <CMSIS/LPC122x.h>
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#include "uart.h"
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#define IER_RBR 0x01
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#define IER_THRE 0x02
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#define IER_RLS 0x04
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#define IIR_PEND 0x01
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#define IIR_RLS 0x03
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#define IIR_RDA 0x02
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#define IIR_CTI 0x06
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#define IIR_THRE 0x01
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#define LSR_RDR 0x01
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#define LSR_OE 0x02
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#define LSR_PE 0x04
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#define LSR_FE 0x08
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#define LSR_BI 0x10
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#define LSR_THRE 0x20
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#define LSR_TEMT 0x40
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#define LSR_RXFE 0x80
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/**
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* @addtogroup LPC11xx
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*/
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/*@{*/
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#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
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#define UART_BAUDRATE 115200
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struct rt_uart_lpc
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{
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struct rt_device parent;
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/* buffer for reception */
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rt_uint8_t read_index, save_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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}uart_device;
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void UART0_IRQHandler(void)
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{
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rt_ubase_t level, iir;
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struct rt_uart_lpc* uart = &uart_device;
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/* read IIR and clear it */
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iir = LPC_UART0->IIR;
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iir >>= 0x01; /* skip pending bit in IIR */
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iir &= 0x07; /* check bit 1~3, interrupt identification */
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if (iir == IIR_RDA) /* Receive Line Status */
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{
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/* If no error on RLS, normal ready, save into the data buffer. */
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/* Note: read RBR will clear the interrupt */
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uart->rx_buffer[uart->save_index] = LPC_UART0->RBR;
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level = rt_hw_interrupt_disable();
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uart->save_index ++;
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if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
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uart->save_index = 0;
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rt_hw_interrupt_enable(level);
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/* invoke callback */
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if(uart->parent.rx_indicate != RT_NULL)
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{
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rt_size_t length;
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if (uart->read_index > uart->save_index)
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length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
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else
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length = uart->save_index - uart->read_index;
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uart->parent.rx_indicate(&uart->parent, length);
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}
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}
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return;
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}
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/*****************************************************************************
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** Function name: rt_uart_init
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** Descriptions:
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** parameters: dev
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** Returned value: None
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*****************************************************************************/
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static rt_err_t rt_uart_init(rt_device_t dev)
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{
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rt_uint32_t Fdiv;
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rt_uint32_t regVal;
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NVIC_DisableIRQ(UART0_IRQn);
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/* Init UART Hardware */
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LPC_IOCON->PIO0_1 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO0_1 |= 0x02; /* UART RXD */
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LPC_IOCON->PIO0_2 &= ~0x07;
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LPC_IOCON->PIO0_2 |= 0x02; /* UART TXD */
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/* Enable UART clock */
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LPC_SYSCON->PRESETCTRL |= (0x1<<2);
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LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<12);
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LPC_SYSCON->UART0CLKDIV = 0x1; /* divided by 1 */
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LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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regVal = LPC_SYSCON->UART0CLKDIV;
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Fdiv = ((SystemAHBFrequency/regVal)/16)/UART_BAUDRATE ; /*baud rate */
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LPC_UART0->DLM = Fdiv / 256;
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LPC_UART0->DLL = Fdiv % 256;
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LPC_UART0->LCR = 0x03; /* DLAB = 0 */
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LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
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/* Read to clear the line status. */
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regVal = LPC_UART0->LSR;
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/* Ensure a clean start, no data in either TX or RX FIFO. */
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while ( LPC_UART0->LSR & (LSR_THRE|LSR_TEMT) != (LSR_THRE|LSR_TEMT) );
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while ( LPC_UART0->LSR & LSR_RDR )
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{
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regVal = LPC_UART0->RBR; /* Dump data from RX FIFO */
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}
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/* Enable the UART Interrupt */
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NVIC_EnableIRQ(UART0_IRQn);
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LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
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return RT_EOK;
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}
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static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
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{
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RT_ASSERT(dev != RT_NULL);
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if(dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* Enable the UART Interrupt */
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NVIC_EnableIRQ(UART0_IRQn);
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}
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return RT_EOK;
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}
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static rt_err_t rt_uart_close(rt_device_t dev)
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{
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RT_ASSERT(dev != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* Disable the UART Interrupt */
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NVIC_DisableIRQ(UART0_IRQn);
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}
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return RT_EOK;
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}
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static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_uart_lpc *uart = (struct rt_uart_lpc*)dev;
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RT_ASSERT(uart != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (uart->read_index != uart->save_index)
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{
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*ptr = uart->rx_buffer[uart->read_index];
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uart->read_index ++;
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if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
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uart->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++;
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size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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return 0;
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}
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static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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char *ptr;
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ptr = (char*)buffer;
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* stream mode */
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while (size)
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{
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if (*ptr == '\n')
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{
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/* THRE status, contain valid data */
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while ( !(LPC_UART0->LSR & LSR_THRE) );
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/* write data */
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LPC_UART0->THR = '\r';
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}
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/* THRE status, contain valid data */
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while ( !(LPC_UART0->LSR & LSR_THRE) );
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/* write data */
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LPC_UART0->THR = *ptr;
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ptr ++;
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size --;
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}
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}
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else
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{
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while ( size != 0 )
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{
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/* THRE status, contain valid data */
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while ( !(LPC_UART0->LSR & LSR_THRE) );
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/* write data */
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LPC_UART0->THR = *ptr;
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ptr++;
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size--;
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}
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}
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return (rt_size_t) ptr - (rt_size_t) buffer;
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}
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void rt_hw_uart_init(void)
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{
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struct rt_uart_lpc* uart;
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/* get uart device */
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uart = &uart_device;
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/* device initialization */
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uart->parent.type = RT_Device_Class_Char;
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rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
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uart->read_index = uart->save_index = 0;
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/* device interface */
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uart->parent.init = rt_uart_init;
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uart->parent.open = rt_uart_open;
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uart->parent.close = rt_uart_close;
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uart->parent.read = rt_uart_read;
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uart->parent.write = rt_uart_write;
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uart->parent.control = RT_NULL;
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uart->parent.user_data = RT_NULL;
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rt_device_register(&uart->parent,
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"uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
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}
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#endif
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/******************************************************************************
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** End Of File
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******************************************************************************/
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