137 lines
4.0 KiB
C
137 lines
4.0 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_host.h"
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#include "board.h"
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#include "fsl_gpio.h"
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#ifdef BOARD_USDHC_CD_PORT_BASE
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#include "fsl_port.h"
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#endif
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief host controller error recovery.
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* @param host base address.
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*/
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static void Host_ErrorRecovery(HOST_TYPE *hostBase);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* DMA descriptor should allocate at non-cached memory */
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AT_NONCACHEABLE_SECTION_ALIGN(uint32_t g_usdhcAdma2Table[USDHC_ADMA_TABLE_WORDS], USDHC_ADMA2_ADDR_ALIGN);
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extern volatile uint32_t g_timeMilliseconds;
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static volatile bool g_sdInsertedFlag;
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/*******************************************************************************
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* Code
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******************************************************************************/
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/* Card detect. */
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status_t CardInsertDetect(HOST_TYPE *hostBase)
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{
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return kStatus_Success;
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}
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/* User defined transfer function. */
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static status_t USDHC_TransferFunction(USDHC_Type *base, usdhc_transfer_t *content)
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{
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status_t error = kStatus_Success;
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usdhc_adma_config_t dmaConfig;
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if (content != NULL && content->data != NULL)
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{
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memset(&dmaConfig, 0, sizeof(usdhc_adma_config_t));
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/* config adma */
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dmaConfig.dmaMode = USDHC_DMA_MODE;
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dmaConfig.burstLen = kUSDHC_EnBurstLenForINCR;
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dmaConfig.admaTable = g_usdhcAdma2Table;
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dmaConfig.admaTableWords = USDHC_ADMA_TABLE_WORDS;
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}
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error = USDHC_TransferBlocking(base, &dmaConfig, content);
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if (error == kStatus_Fail)
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{
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/* host error recovery */
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Host_ErrorRecovery(base);
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}
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return error;
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}
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static void Host_ErrorRecovery(HOST_TYPE *hostBase)
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{
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uint32_t status = 0U;
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/* get host present status */
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status = USDHC_GetPresentStatusFlags(hostBase);
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/* check command inhibit status flag */
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if ((status & kUSDHC_CommandInhibitFlag) != 0U)
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{
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/* reset command line */
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USDHC_Reset(hostBase, kUSDHC_ResetCommand, 100U);
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}
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/* check data inhibit status flag */
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if ((status & kUSDHC_DataInhibitFlag) != 0U)
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{
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/* reset data line */
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USDHC_Reset(hostBase, kUSDHC_ResetData, 100U);
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}
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}
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status_t HOST_Init(void *host)
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{
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usdhc_host_t *usdhcHost = (usdhc_host_t *)host;
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/* init card power control */
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HOST_INIT_SD_POWER();
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HOST_INIT_MMC_POWER();
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/* Initializes USDHC. */
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usdhcHost->config.dataTimeout = USDHC_DATA_TIMEOUT;
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usdhcHost->config.endianMode = USDHC_ENDIAN_MODE;
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usdhcHost->config.readWatermarkLevel = USDHC_READ_WATERMARK_LEVEL;
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usdhcHost->config.writeWatermarkLevel = USDHC_WRITE_WATERMARK_LEVEL;
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usdhcHost->config.readBurstLen = USDHC_READ_BURST_LEN;
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usdhcHost->config.writeBurstLen = USDHC_WRITE_BURST_LEN;
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USDHC_Init(usdhcHost->base, &(usdhcHost->config));
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/* Define transfer function. */
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usdhcHost->transfer = USDHC_TransferFunction;
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return kStatus_Success;
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}
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void HOST_Reset(HOST_TYPE *hostBase)
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{
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/* voltage switch to normal but not 1.8V */
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HOST_SWITCH_VOLTAGE180V(hostBase, false);
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/* Disable DDR mode */
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HOST_ENABLE_DDR_MODE(hostBase, false);
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/* disable tuning */
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HOST_EXECUTE_STANDARD_TUNING_ENABLE(hostBase, false);
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/* Disable HS400 mode */
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HOST_ENABLE_HS400_MODE(hostBase, false);
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/* Disable DLL */
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HOST_ENABLE_STROBE_DLL(hostBase, false);
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}
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void HOST_Deinit(void *host)
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{
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usdhc_host_t *usdhcHost = (usdhc_host_t *)host;
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USDHC_Deinit(usdhcHost->base);
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}
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